@@ -793,7 +793,6 @@ Nick Thompson <nick.thompson@gefanuc.com>
Albin Tonnerre <albin.tonnerre@free-electrons.com>
- sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC)
tny_a9260 ARM926EJS (AT91SAM9260 SoC)
tny_a9g20 ARM926EJS (AT91SAM9G20 SoC)
@@ -396,7 +396,6 @@ LIST_at91="$(boards_by_soc at91)\
at91sam9260ek \
at91sam9g20ek \
pm9g45 \
- SBC35_A9G20 \
TNY_A9260 \
TNY_A9G20 \
"
@@ -800,13 +800,6 @@ pm9g45_config : unconfig
@mkdir -p $(obj)include
@$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
-SBC35_A9G20_NANDFLASH_config \
-SBC35_A9G20_EEPROM_config \
-SBC35_A9G20_config : unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
- @$(MKCONFIG) -n $@ -a sbc35_a9g20 arm arm926ejs sbc35_a9g20 calao at91
-
TNY_A9G20_NANDFLASH_config \
TNY_A9G20_EEPROM_config \
TNY_A9G20_config \
deleted file mode 100644
@@ -1,55 +0,0 @@
-#
-# (C) Copyright 2003-2008
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# (C) Copyright 2008
-# Stelian Pop <stelian.pop@leadtechdesign.com>
-# Lead Tech Design <www.leadtechdesign.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += sbc35_a9g20.o
-COBJS-$(CONFIG_ATMEL_SPI) += spi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
deleted file mode 100644
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f00000
deleted file mode 100644
@@ -1,190 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * Copyright (C) 2009
- * Albin Tonnerre, Free-Electrons <albin.tonnerre@free-electrons.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9260.h>
-#include <asm/arch/at91sam9260_matrix.h>
-#include <asm/arch/at91sam9_smc.h>
-#include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
-#include <asm/arch/at91_rstc.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
-#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
-#include <net.h>
-#endif
-#include <netdev.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-/*
- * Miscelaneous platform dependent initialisations
- */
-
-#ifdef CONFIG_CMD_NAND
-static void sbc35_a9g20_nand_hw_init(void)
-{
- unsigned long csa;
-
- /* Enable CS3 */
- csa = at91_sys_read(AT91_MATRIX_EBICSA);
- at91_sys_write(AT91_MATRIX_EBICSA,
- csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
-
- /* Configure SMC CS3 for NAND/SmartMedia */
- at91_sys_write(AT91_SMC_SETUP(3),
- AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
- AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
- at91_sys_write(AT91_SMC_PULSE(3),
- AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
- AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
- at91_sys_write(AT91_SMC_CYCLE(3),
- AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
- at91_sys_write(AT91_SMC_MODE(3),
- AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
- AT91_SMC_EXNWMODE_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
- AT91_SMC_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
- AT91_SMC_DBW_8 |
-#endif
- AT91_SMC_TDF_(2));
-
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
-
- /* Configure RDY/BSY */
- at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
-
- /* Enable NandFlash */
- at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
-}
-#endif
-
-#ifdef CONFIG_MACB
-static void sbc35_a9g20_macb_hw_init(void)
-{
- unsigned long rstc;
-
- /* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
-
- /*
- * Disable pull-up on:
- * RXDV (PA17) => PHY normal mode (not Test mode)
- * ERX0 (PA14) => PHY ADDR0
- * ERX1 (PA15) => PHY ADDR1
- * ERX2 (PA25) => PHY ADDR2
- * ERX3 (PA26) => PHY ADDR3
- * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
- *
- * PHY has internal pull-down
- */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
-
- rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0D << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (rstc) |
- AT91_RSTC_URSTEN);
-
- /* Re-enable pull-up */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
-
- at91_macb_hw_init();
-}
-#endif
-
-int board_init(void)
-{
- /* Enable Ctrlc */
- console_init_f();
-
- gd->bd->bi_arch_number = MACH_TYPE_SBC35_A9G20;
- /* adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-
- at91_serial_hw_init();
- sbc35_a9g20_nand_hw_init();
-#ifdef CONFIG_ATMEL_SPI
- at91_spi0_hw_init(1 << 4 | 1 << 5);
-#endif
-#ifdef CONFIG_MACB
- sbc35_a9g20_macb_hw_init();
-#endif
-
- return 0;
-}
-
-int dram_init(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM;
- if(get_ram_size((long *) PHYS_SDRAM, PHYS_SDRAM_SIZE) != PHYS_SDRAM_SIZE)
- return -1;
-
- gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
- return 0;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
-{
-}
-#endif
-
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_MACB
- rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
-#endif
- return rc;
-}
deleted file mode 100644
@@ -1,57 +0,0 @@
-/*
- * Copyright (C) 2009
- * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/at91_spi.h>
-#include <asm/arch/gpio.h>
-#include <spi.h>
-
-#define SBC_A9260_CS0_PIN AT91_PIN_PA3
-#define SBC_A9260_CS1_PIN AT91_PIN_PC11
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- return bus == 0 && (cs == 1 || cs == 0);
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
- if(slave->cs == 0)
- at91_set_gpio_value(SBC_A9260_CS0_PIN, 0);
- else if(slave->cs == 1)
- at91_set_gpio_value(SBC_A9260_CS1_PIN, 0);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
- if(slave->cs == 0)
- at91_set_gpio_value(SBC_A9260_CS0_PIN, 1);
- else if(slave->cs == 1)
- at91_set_gpio_value(SBC_A9260_CS1_PIN, 1);
-}
-
-void spi_init_f(void)
-{
- /* everything done in board_init */
-}
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
Board Arch CPU removed Commit last known maintainer/contact
=============================================================================
+sbc35_a9g20 arm arm926ejs - 2011-07-17 Albin Tonnerre <albin.tonnerre@free-electrons.com>
at91sam9rlek arm arm926ejs - 2011-07-17 Stelian Pop <stelian.pop@leadtechdesign.com>
at91sam9g45ekes arm arm926ejs - 2011-07-17
at91sam9m10g45ek arm arm926ejs - 2011-07-17 Sedji Gaouaou<sedji.gaouaou@atmel.com>
deleted file mode 100644
@@ -1,195 +0,0 @@
-/*
- * Copyright (C) 2009
- * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
- *
- * Configuation settings for the Calao SBC35-A9G20 board
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_AT91_LEGACY
-
-#if defined(CONFIG_SBC35_A9G20_NANDFLASH) || defined(CONFIG_SBC35_A9G20_EEPROM)
-#define CONFIG_SBC35_A9G20
-#endif
-
-#define CONFIG_AT91SAM9G20
-
-#if defined(CONFIG_SBC35_A9G20_NANDFLASH)
-#define CONFIG_ENV_IS_IN_NAND
-#else
-#define CONFIG_ENV_IS_IN_EEPROM
-#endif
-
-/* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
-#define CONFIG_SYS_HZ 1000
-
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
-
-#define CONFIG_ARCH_CPU_INIT
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/*
- * Hardware drivers
- */
-#define CONFIG_AT91_GPIO 1
-#define CONFIG_ATMEL_USART
-#define CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
-
-#define CONFIG_BOOTDELAY 3
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-#undef CONFIG_CMD_BDI
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_IMI
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_SOURCE
-
-#define CONFIG_CMD_PING 1
-#define CONFIG_CMD_DHCP 1
-#define CONFIG_CMD_USB 1
-
-/* SDRAM */
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM 0x20000000
-#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-
-/* SPI EEPROM */
-#define CONFIG_SPI
-#define CONFIG_CMD_SPI
-#define CONFIG_ATMEL_SPI
-#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
-
-#define CONFIG_CMD_EEPROM
-#define CONFIG_SPI_M95XXX
-#define CONFIG_SYS_EEPROM_SIZE 0x10000
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
-
-/* SPI RTC */
-#define CONFIG_CMD_DATE
-#define CONFIG_RTC_M41T94
-#define CONFIG_M41T94_SPI_BUS 0
-#define CONFIG_M41T94_SPI_CS 0
-
-/* NAND flash */
-#define CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_DBW_8 1
-/* our ALE is AD21 */
-#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
-/* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
-
-/* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH 1
-
-/* Ethernet */
-#define CONFIG_MACB 1
-#define CONFIG_RMII 1
-#define CONFIG_NET_MULTI 1
-#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_RESET_PHY_R 1
-#define CONFIG_MACB_SEARCH_PHY 1
-
-/* USB */
-#define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW 1
-#define CONFIG_DOS_PARTITION 1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_USB_STORAGE 1
-#define CONFIG_CMD_FAT 1
-
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END 0x23e00000
-
-/* Env in EEPROM, bootstrap + u-boot in NAND*/
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-#define CONFIG_ENV_OFFSET 0x20
-#define CONFIG_ENV_SIZE 0x1000
-#endif
-
-/* Env, bootstrap and u-boot in NAND */
-#ifdef CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
-#define CONFIG_ENV_SIZE 0x20000
-#endif
-
-#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
-#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
- "root=/dev/mtdblock1 " \
- "mtdparts=atmel_nand:16M(kernel)ro," \
- "120M(rootfs),-(other) " \
- "rw rootfstype=jffs2"
-
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
-
-#define CONFIG_SYS_PROMPT "U-Boot> "
-#define CONFIG_SYS_CBSIZE 256
-#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
-#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
-
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
-#endif
-
-#endif
Signed-off-by: Wolfgang Denk <wd@denx.de> --- MAINTAINERS | 1 - MAKEALL | 1 - Makefile | 7 - board/calao/sbc35_a9g20/Makefile | 55 --------- board/calao/sbc35_a9g20/config.mk | 1 - board/calao/sbc35_a9g20/sbc35_a9g20.c | 190 -------------------------------- board/calao/sbc35_a9g20/spi.c | 57 ---------- doc/README.scrapyard | 1 + include/configs/sbc35_a9g20.h | 195 --------------------------------- 9 files changed, 1 insertions(+), 507 deletions(-) delete mode 100644 board/calao/sbc35_a9g20/Makefile delete mode 100644 board/calao/sbc35_a9g20/config.mk delete mode 100644 board/calao/sbc35_a9g20/sbc35_a9g20.c delete mode 100644 board/calao/sbc35_a9g20/spi.c delete mode 100644 include/configs/sbc35_a9g20.h