@@ -766,9 +766,12 @@ init_shared_sprs:
mtspr SPR_TSCR, %r3
/* HID0: Clear bit 5 (enable core recovery)
* Clear bit 4 (HILE)
+ * Set bit 8 (radix)
*/
mfspr %r3,SPR_HID0
li %r0,1
+ sldi %r4,%r0,(63-8)
+ or %r3,%r3,%r4
sldi %r4,%r0,(63-5)
sldi %r5,%r0,(63-4)
or %r0,%r4,%r5
@@ -1433,7 +1433,7 @@ static int64_t cpu_change_all_hid0(struct hid0_change_req *req)
return OPAL_SUCCESS;
}
-void cpu_set_radix_mode(void)
+static void cpu_set_radix_mode(void)
{
struct hid0_change_req req;
@@ -1271,9 +1271,6 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt)
prd_register_reserved_memory();
- /* On P9, switch to radix mode by default */
- cpu_set_radix_mode();
-
checksum_romem();
load_and_boot_kernel(false);
@@ -313,7 +313,6 @@ extern unsigned long __attrconst cpu_emergency_stack_top(unsigned int pir);
extern void cpu_idle_job(void);
extern void cpu_idle_delay(unsigned long delay);
-extern void cpu_set_radix_mode(void);
extern void cpu_fast_reboot_complete(void);
int dctl_set_special_wakeup(struct cpu_thread *t);
When running in virtual memory mode, the radix MMU hid bit should not be changed, so set this in the initial boot SPR setup. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- asm/head.S | 3 +++ core/cpu.c | 2 +- core/init.c | 3 --- include/cpu.h | 1 - 4 files changed, 4 insertions(+), 5 deletions(-)