@@ -363,6 +363,12 @@ static phys_size_t sdram_setup(int casl)
udelay (1000);
#endif /* CONFIG_TQM8548 */
+ /*
+ * get_ram_size() depends on having tlbs for the DDR, but they are
+ * not yet setup because we don't know the size. Set up a temp
+ * mapping and delete it when done.
+ */
+ setup_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB);
for (i = 0; i < N_DDR_CS_CONF; i++) {
ddr->cs0_config = ddr_cs_conf[i].reg;
@@ -376,6 +382,7 @@ static phys_size_t sdram_setup(int casl)
break;
}
}
+ clear_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB);
#ifdef CONFIG_TQM8548
if (i < N_DDR_CS_CONF) {
@@ -152,8 +152,10 @@
defined(CONFIG_TQM8548_AG) || \
defined(CONFIG_TQM8548_BE)
#define CONFIG_SYS_PPC_DDR_WIMGE (MAS2_I | MAS2_G)
+#define CONFIG_SYS_DDR_EARLY_SIZE_MB (512)
#else
#define CONFIG_SYS_PPC_DDR_WIMGE (0)
+#define CONFIG_SYS_DDR_EARLY_SIZE_MB (2 * 1024)
#endif
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
We need a TLB entry to call get_ram_size(); the common code doesn't create one until *after* fixed_sdram() has determined the size. So we set up tlbs for the max possible size and tear them down once we're done with get_ram_size(); the common 85xx code will then set up a final set of tlb entries for the *actual* detected size of ddr. This prevents us from having TLB entries that are larger than DDR sitting around for very long, which is not a recommended scenario. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> --- board/tqc/tqm85xx/sdram.c | 7 +++++++ include/configs/TQM85xx.h | 2 ++ 2 files changed, 9 insertions(+), 0 deletions(-)