@@ -39,6 +39,10 @@
};
};
+&bsec {
+ u-boot,dm-pre-reloc;
+};
+
&clk_hsi {
u-boot,dm-pre-reloc;
};
@@ -996,6 +996,13 @@
status = "disabled";
};
+ bsec: nvmem@5c005000 {
+ compatible = "st,stm32mp15-bsec";
+ reg = <0x5c005000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
i2c6: i2c@5c009000 {
compatible = "st,stm32f7-i2c";
reg = <0x5c009000 0x400>;
@@ -434,7 +434,7 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
}
static const struct udevice_id stm32mp_bsec_ids[] = {
- { .compatible = "st,stm32mp-bsec" },
+ { .compatible = "st,stm32mp15-bsec" },
{}
};
@@ -446,13 +446,3 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
.ops = &stm32mp_bsec_ops,
};
-
-/* bsec IP is not present in device tee, manage IP address by platdata */
-static struct stm32mp_bsec_platdata stm32_bsec_platdata = {
- .base = STM32_BSEC_BASE,
-};
-
-U_BOOT_DEVICE(stm32mp_bsec) = {
- .name = "stm32mp_bsec",
- .platdata = &stm32_bsec_platdata,
-};
@@ -13,7 +13,6 @@
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_DBGMCU_BASE 0x50081000
-#define STM32_BSEC_BASE 0x5C005000
#define STM32_TZC_BASE 0x5C006000
#define STM32_ETZPC_BASE 0x5C007000
#define STM32_TAMP_BASE 0x5C00A000
Update bsec driver to use the device tree provided by Kernel. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> --- arch/arm/dts/stm32mp157-u-boot.dtsi | 4 ++++ arch/arm/dts/stm32mp157c.dtsi | 7 +++++++ arch/arm/mach-stm32mp/bsec.c | 12 +----------- arch/arm/mach-stm32mp/include/mach/stm32.h | 1 - 4 files changed, 12 insertions(+), 12 deletions(-)