Patchwork [U-Boot,1/4] cosmetic

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Submitter Michael Jones
Date July 15, 2011, 8:09 a.m.
Message ID <1310717371-1677-2-git-send-email-michael.jones@matrix-vision.de>
Download mbox | patch
Permalink /patch/104759/
State Accepted
Commit f9a78b8d4f1e9b42eb0563029a22fd6c34390088
Headers show

Comments

Michael Jones - July 15, 2011, 8:09 a.m.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
---
 README                             |    6 +++---
 arch/arm/include/asm/global_data.h |    2 +-
 common/cmd_eeprom.c                |    2 +-
 common/cmd_i2c.c                   |    4 ++--
 drivers/i2c/omap24xx_i2c.c         |    2 +-
 include/altera.h                   |   10 +++++-----
 6 files changed, 13 insertions(+), 13 deletions(-)
Detlev Zundel - July 15, 2011, 3:15 p.m.
Hi Michael,

> Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>

Acked-by: Detlev Zundel <dzu@denx.de>

Cheers
  Detlev

Patch

diff --git a/README b/README
index 446966d..38428cc 100644
--- a/README
+++ b/README
@@ -1693,12 +1693,12 @@  The following options need to be configured:
 		=>
 
 		If you now switch to the new I2C Bus 3 with "i2c dev 3"
-		u-boot sends First the Commando to the mux@70 to enable
-		channel 6, and then the Commando to the mux@71 to enable
+		u-boot first sends the command to the mux@70 to enable
+		channel 6, and then the command to the mux@71 to enable
 		the channel 4.
 
 		After that, you can use the "normal" i2c commands as
-		usual, to communicate with your I2C devices behind
+		usual to communicate with your I2C devices behind
 		the 2 muxes.
 
 		This option is actually implemented for the bitbanging
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index ef9959e..7439a88 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -24,7 +24,7 @@ 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
 /*
- * The following data structure is placed in some memory wich is
+ * The following data structure is placed in some memory which is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
  * some locked parts of the data cache) to allow for a minimum set of
  * global variables during system initialization (until we have set
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index 9f4b22c..e911377 100644
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -250,7 +250,7 @@  int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 
 		/*
 		 * For a FRAM device there is no limit on the number of the
-		 * bytes that can be ccessed with the single read or write
+		 * bytes that can be accessed with the single read or write
 		 * operation.
 		 */
 #if !defined(CONFIG_SYS_I2C_FRAM)
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index d913e13..3ea75f7 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -1397,8 +1397,8 @@  static int i2c_mux_get_busid (void)
 	return tmp;
 }
 
-/* Analyses a Muxstring and sends immediately the
-   Commands to the Muxes. Runs from Flash.
+/* Analyses a Muxstring and immediately sends the
+   commands to the muxes. Runs from flash.
  */
 int i2c_mux_ident_muxstring_f (uchar *buf)
 {
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 71251d8..966ffc4 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -399,7 +399,7 @@  static void wait_for_bb (void)
 	int timeout = I2C_TIMEOUT;
 	u16 stat;
 
-	writew(0xFFFF, &i2c_base->stat);	 /* clear current interruts...*/
+	writew(0xFFFF, &i2c_base->stat);	/* clear current interrupts...*/
 	while ((stat = readw (&i2c_base->stat) & I2C_STAT_BB) && timeout--) {
 		writew (stat, &i2c_base->stat);
 		udelay(1000);
diff --git a/include/altera.h b/include/altera.h
index bc21ddf..f28a6a8 100644
--- a/include/altera.h
+++ b/include/altera.h
@@ -51,18 +51,18 @@  typedef enum {				/* typedef Altera_iface */
 	passive_parallel_asynchronous,	/* parallel data */
 	passive_serial_asynchronous,	/* serial data w/ internal clock (not used)	*/
 	altera_jtag_mode,		/* jtag/tap serial (not used ) */
-	fast_passive_parallel,	/* fast passive parallel (FPP) */
+	fast_passive_parallel,		/* fast passive parallel (FPP) */
 	fast_passive_parallel_security,	/* fast passive parallel with security (FPPS) */
 	max_altera_iface_type		/* insert all new types before this */
 } Altera_iface;				/* end, typedef Altera_iface */
 
 typedef enum {			/* typedef Altera_Family */
-    min_altera_type,		/* insert all new types after this */
-    Altera_ACEX1K,		/* ACEX1K Family */
-    Altera_CYC2,		/* CYCLONII Family */
+	min_altera_type,	/* insert all new types after this */
+	Altera_ACEX1K,		/* ACEX1K Family */
+	Altera_CYC2,		/* CYCLONII Family */
 	Altera_StratixII,	/* StratixII Familiy */
 /* Add new models here */
-    max_altera_type		/* insert all new types before this */
+	max_altera_type		/* insert all new types before this */
 } Altera_Family;		/* end, typedef Altera_Family */
 
 typedef struct {		/* typedef Altera_desc */