From patchwork Thu Jul 14 09:41:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [v2,4/8] SPARC64: fp_disabled checks on stfa/stdfa/stqfa Date: Wed, 13 Jul 2011 23:41:39 -0000 From: Tsuneo Saito X-Patchwork-Id: 104660 Message-Id: <1310636503-8956-5-git-send-email-tsnsaito@gmail.com> To: qemu-devel@nongnu.org Cc: Tsuneo Saito stfa/stdfa/stqfa instructions should raise fp_disabled exceptions if %pstate.PEF==0 or %fprs.FEF==0. Signed-off-by: Tsuneo Saito --- target-sparc/translate.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index a5a8eaf..5f92dbb 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4732,6 +4732,9 @@ static void disas_sparc_insn(DisasContext * dc) switch (xop) { #ifdef TARGET_SPARC64 case 0x34: /* V9 stfa */ + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } gen_stf_asi(cpu_addr, insn, 4, rd); break; case 0x36: /* V9 stqfa */ @@ -4739,6 +4742,9 @@ static void disas_sparc_insn(DisasContext * dc) TCGv_i32 r_const; CHECK_FPU_FEATURE(dc, FLOAT128); + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } r_const = tcg_const_i32(7); gen_helper_check_align(cpu_addr, r_const); tcg_temp_free_i32(r_const); @@ -4746,6 +4752,9 @@ static void disas_sparc_insn(DisasContext * dc) } break; case 0x37: /* V9 stdfa */ + if (gen_trap_ifnofpu(dc, cpu_cond)) { + goto jmp_insn; + } gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); break; case 0x3c: /* V9 casa */