[v2,10/12] arm64: dts: tegra210: set EDP interrupt line

Message ID	1550744327-4677-11-git-send-email-wni@nvidia.com
State	Deferred
Headers	show Return-Path: <linux-tegra-owner@vger.kernel.org> TLS: TLSv1.2, DES-CBC3-SHA) id <B5c6e7b2f0001>; Thu, 21 Feb 2019 02:19:27 -0800 From: Wei Ni <wni@nvidia.com> To: <daniel.lezcano@linaro.org>, <edubezval@gmail.com>, <robh@kernel.org> CC: <thierry.reding@gmail.com>, <linux-tegra@vger.kernel.org>, <rui.zhang@intel.com>, <srikars@nvidia.com>, <linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>, Wei Ni <wni@nvidia.com> Subject: [PATCH v2 10/12] arm64: dts: tegra210: set EDP interrupt line Date: Thu, 21 Feb 2019 18:18:45 +0800 Message-ID: <1550744327-4677-11-git-send-email-wni@nvidia.com> In-Reply-To: <1550744327-4677-1-git-send-email-wni@nvidia.com> References: <1550744327-4677-1-git-send-email-wni@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk
Series	Add some functionalities for Tegra soctherm \| expand [v2,00/12] Add some functionalities for Tegra soctherm [v2,01/12] of: Add bindings of thermtrip for Tegra soctherm [v2,02/12] thermal: tegra: support hw and sw shutdown [v2,03/12] arm64: dts: tegra210: set thermtrip [v2,04/12] of: Add bindings of gpu hw throttle for Tegra soctherm [v2,05/12] thermal: tegra: add support for gpu hw-throttle [v2,06/12] arm64: dts: tegra210: set gpu hw throttle level [v2,07/12] thermal: tegra: add support for thermal IRQ [v2,08/12] thermal: tegra: add set_trips functionality [v2,09/12] thermal: tegra: add support for EDP IRQ [v2,10/12] arm64: dts: tegra210: set EDP interrupt line [v2,11/12] of: Add bindings of OC hw throttle for Tegra soctherm [v2,12/12] thermal: tegra: enable OC hw throttle

Message ID

1550744327-4677-11-git-send-email-wni@nvidia.com

State

Deferred

Headers

From: Wei Ni <wni@nvidia.com>
To: <daniel.lezcano@linaro.org>, <edubezval@gmail.com>, <robh@kernel.org>
CC: <thierry.reding@gmail.com>, <linux-tegra@vger.kernel.org>,
	<rui.zhang@intel.com>, <srikars@nvidia.com>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, Wei Ni <wni@nvidia.com>
Subject: [PATCH v2 10/12] arm64: dts: tegra210: set EDP interrupt line
Date: Thu, 21 Feb 2019 18:18:45 +0800
Message-ID: <1550744327-4677-11-git-send-email-wni@nvidia.com>
In-Reply-To: <1550744327-4677-1-git-send-email-wni@nvidia.com>
References: <1550744327-4677-1-git-send-email-wni@nvidia.com>
MIME-Version: 1.0
Content-Type: text/plain
Sender: linux-tegra-owner@vger.kernel.org
Precedence: bulk

Series

Add some functionalities for Tegra soctherm | expand

Commit Message

Wei Ni Feb. 21, 2019, 10:18 a.m. UTC

Set EDP interrupt line.

Signed-off-by: Wei Ni <wni@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra210.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 551600513c1a..19966b9f5ce7 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1402,7 +1402,8 @@ 
 		reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
 			0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
 		reg-names = "soctherm-reg", "car-reg";
-		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH
+			      GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&tegra_car TEGRA210_CLK_TSENSOR>,
 			<&tegra_car TEGRA210_CLK_SOC_THERM>;
 		clock-names = "tsensor", "soctherm";

[v2,10/12] arm64: dts: tegra210: set EDP interrupt line

Commit Message

Patch