Message ID | 1550677803-29716-2-git-send-email-gareth.williams.jx@renesas.com |
---|---|
State | Superseded |
Headers | show |
Series | i2c: designware: Add support for a bus clock | expand |
On Wed, Feb 20, 2019 at 03:50:02PM +0000, Gareth Williams wrote: > From: Phil Edworthy <phil.edworthy@renesas.com> > > The driver requires an undocumented clock property, so detail it. > Add documentation for a separate, optional, bus clock. > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Looks good to me: Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Let's see what the designware maintainers have to say. > > v3: > - Changed clocks and clock-names sections to use term "peripheral clock" > (pclk) instead of "bus clock" (busclk). > v2: > - No changes. > v1: > - Reviewed-by: Rob Herring <robh@kernel.org> > --- > Documentation/devicetree/bindings/i2c/i2c-designware.txt | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt > index 3e4bcc2..f94aa59 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt > +++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt > @@ -6,12 +6,21 @@ Required properties : > or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback > - reg : Offset and length of the register set for the device > - interrupts : <IRQ> where IRQ is the interrupt number. > + - clocks : phandles for the clocks, see the description of clock-names below. > + The phandle for the "ic_clk" clock is required. The phandle for the "pclk" > + clock is optional. If a single clock is specified but no clock-name, it is > + the "ic_clk" clock. If both clocks are listed, the "ic_clk" must be first. > > Recommended properties : > > - clock-frequency : desired I2C bus clock frequency in Hz. > > Optional properties : > + > + - clock-names : Contains the names of the clocks: > + "ic_clk", for the core clock used to generate the external I2C clock. > + "pclk", the peripheral clock, required for register accesses. > + > - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold > time, named ICPU_CFG:TWI_DELAY in the datasheet. > > -- > 2.7.4 >
diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt index 3e4bcc2..f94aa59 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt @@ -6,12 +6,21 @@ Required properties : or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback - reg : Offset and length of the register set for the device - interrupts : <IRQ> where IRQ is the interrupt number. + - clocks : phandles for the clocks, see the description of clock-names below. + The phandle for the "ic_clk" clock is required. The phandle for the "pclk" + clock is optional. If a single clock is specified but no clock-name, it is + the "ic_clk" clock. If both clocks are listed, the "ic_clk" must be first. Recommended properties : - clock-frequency : desired I2C bus clock frequency in Hz. Optional properties : + + - clock-names : Contains the names of the clocks: + "ic_clk", for the core clock used to generate the external I2C clock. + "pclk", the peripheral clock, required for register accesses. + - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold time, named ICPU_CFG:TWI_DELAY in the datasheet.