Patchwork [SPARC] Another minor tweak

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Submitter Eric Botcazou
Date July 11, 2011, 9:26 a.m.
Message ID <201107111126.44747.ebotcazou@adacore.com>
Download mbox | patch
Permalink /patch/104190/
State New
Headers show

Comments

Eric Botcazou - July 11, 2011, 9:26 a.m.
Since DWARF2 uses DW_CFA_GNU_window_save and the middle-end REG_CFA_WINDOW_SAVE 
to designate the thing, this makes the SPARC back-end use the same wording.

Tested on SPARC/Solaris, applied on the mainline.


2011-07-11  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc.md (save_register_window_1): Rename to...
	(window_save): ...this.
	* config/sparc/sparc.c (emit_save_register_window): Rename to...
	(emit_window_save): ...this.
	(sparc_expand_prologue): Adjust to above renaming.

Patch

Index: config/sparc/sparc.md
===================================================================
--- config/sparc/sparc.md	(revision 176072)
+++ config/sparc/sparc.md	(working copy)
@@ -6276,10 +6276,10 @@  (define_expand "prologue"
   DONE;
 })
 
-;; The "save register window" insn is modelled as follows.  The dwarf2
-;; information is manually added in emit_save_register_window in sparc.c.
+;; The "register window save" insn is modelled as follows.  The dwarf2
+;; information is manually added in emit_window_save.
 
-(define_insn "save_register_window_1"
+(define_insn "window_save"
   [(unspec_volatile
 	[(match_operand 0 "arith_operand" "rI")]
 	UNSPECV_SAVEW)]
Index: config/sparc/sparc.c
===================================================================
--- config/sparc/sparc.c	(revision 176072)
+++ config/sparc/sparc.c	(working copy)
@@ -4590,14 +4590,12 @@  emit_save_or_restore_local_in_regs (rtx
 			     save_local_or_in_reg_p, action, SORR_ADVANCE);
 }
 
-/* Generate a save_register_window insn.  */
+/* Emit a window_save insn.  */
 
 static rtx
-emit_save_register_window (rtx increment)
+emit_window_save (rtx increment)
 {
-  rtx insn;
-
-  insn = emit_insn (gen_save_register_window_1 (increment));
+  rtx insn = emit_insn (gen_window_save (increment));
   RTX_FRAME_RELATED_P (insn) = 1;
 
   /* The incoming return address (%o7) is saved in %i7.  */
@@ -4716,10 +4714,10 @@  sparc_expand_prologue (void)
       rtx size_int_rtx = GEN_INT (-size);
 
       if (size <= 4096)
-	emit_save_register_window (size_int_rtx);
+	emit_window_save (size_int_rtx);
       else if (size <= 8192)
 	{
-	  emit_save_register_window (GEN_INT (-4096));
+	  emit_window_save (GEN_INT (-4096));
 	  /* %sp is not the CFA register anymore.  */
 	  emit_insn (gen_stack_pointer_inc (GEN_INT (4096 - size)));
 	}
@@ -4727,7 +4725,7 @@  sparc_expand_prologue (void)
 	{
 	  rtx size_rtx = gen_rtx_REG (Pmode, 1);
 	  emit_move_insn (size_rtx, size_int_rtx);
-	  emit_save_register_window (size_rtx);
+	  emit_window_save (size_rtx);
 	}
     }