[U-Boot] riscv: fu540: enable SMP

Message ID 20190211224136.3180-1-lukas.auer@aisec.fraunhofer.de
State Superseded
Delegated to: Andes
Headers show
Series
  • [U-Boot] riscv: fu540: enable SMP
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Commit Message

Auer, Lukas Feb. 11, 2019, 10:41 p.m.
Hart 0 on the SiFive FU540 is meant for monitoring tasks. It is a E51
core, whereas all other cores are U54 cores. Select hart 1 as the main
hart to run U-Boot.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
---
This patch depends on the SMP support [1] and the SiFive FU540 support
patch series [2].
I have submitted it independently from the SMP support patch series to
allow the series to be merged independently from the SiFive FU540
support patch series.

[1]: https://patchwork.ozlabs.org/project/uboot/list/?series=91320
[2]: https://patchwork.ozlabs.org/project/uboot/list/?series=91125

 board/sifive/fu540/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Anup Patel Feb. 12, 2019, 5:05 a.m. | #1
> -----Original Message-----
> From: Lukas Auer [mailto:lukas.auer@aisec.fraunhofer.de]
> Sent: Tuesday, February 12, 2019 4:12 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra <Atish.Patra@wdc.com>; Anup Patel
> <Anup.Patel@wdc.com>; Bin Meng <bmeng.cn@gmail.com>; Andreas
> Schwab <schwab@suse.de>; Palmer Dabbelt <palmer@sifive.com>;
> Alexander Graf <agraf@suse.de>; Lukas Auer
> <lukas.auer@aisec.fraunhofer.de>; Anup Patel <Anup.Patel@wdc.com>;
> Atish Patra <Atish.Patra@wdc.com>; Paul Walmsley
> <paul.walmsley@sifive.com>
> Subject: [PATCH] riscv: fu540: enable SMP
> 
> Hart 0 on the SiFive FU540 is meant for monitoring tasks. It is a E51 core,
> whereas all other cores are U54 cores. Select hart 1 as the main hart to run U-
> Boot.
> 
> Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
> ---
> This patch depends on the SMP support [1] and the SiFive FU540 support
> patch series [2].
> I have submitted it independently from the SMP support patch series to
> allow the series to be merged independently from the SiFive FU540 support
> patch series.
> 
> [1]: https://patchwork.ozlabs.org/project/uboot/list/?series=91320
> [2]: https://patchwork.ozlabs.org/project/uboot/list/?series=91125
> 
>  board/sifive/fu540/Kconfig | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index
> 6be3d88144..d8a6020cf8 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -16,6 +16,9 @@ config SYS_TEXT_BASE
>  	default 0x80000000 if !RISCV_SMODE
>  	default 0x80200000 if RISCV_SMODE
> 
> +config MAIN_HART
> +	default 1
> +
>  config BOARD_SPECIFIC_OPTIONS # dummy
>  	def_bool y
>  	select GENERIC_RISCV
> @@ -38,5 +41,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
>  	imply PHY_LIB
>  	imply PHY_MSCC
>  	imply SIFIVE_SERIAL
> +	imply SMP
> 
>  endif
> --
> 2.20.1

It will be better if we can get rid off MAIN_HART config option.
Otherwise, looks good to me.

Reviewed-by: Anup Patel <anup.patel@wdc.com>

Regards,
Anup
Auer, Lukas Feb. 17, 2019, 10:09 p.m. | #2
On Tue, 2019-02-12 at 05:05 +0000, Anup Patel wrote:
> > -----Original Message-----
> > From: Lukas Auer [mailto:lukas.auer@aisec.fraunhofer.de]
> > Sent: Tuesday, February 12, 2019 4:12 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra <Atish.Patra@wdc.com>; Anup Patel
> > <Anup.Patel@wdc.com>; Bin Meng <bmeng.cn@gmail.com>; Andreas
> > Schwab <schwab@suse.de>; Palmer Dabbelt <palmer@sifive.com>;
> > Alexander Graf <agraf@suse.de>; Lukas Auer
> > <lukas.auer@aisec.fraunhofer.de>; Anup Patel <Anup.Patel@wdc.com>;
> > Atish Patra <Atish.Patra@wdc.com>; Paul Walmsley
> > <paul.walmsley@sifive.com>
> > Subject: [PATCH] riscv: fu540: enable SMP
> > 
> > Hart 0 on the SiFive FU540 is meant for monitoring tasks. It is a
> > E51 core,
> > whereas all other cores are U54 cores. Select hart 1 as the main
> > hart to run U-
> > Boot.
> > 
> > Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
> > ---
> > This patch depends on the SMP support [1] and the SiFive FU540
> > support
> > patch series [2].
> > I have submitted it independently from the SMP support patch series
> > to
> > allow the series to be merged independently from the SiFive FU540
> > support
> > patch series.
> > 
> > [1]: https://patchwork.ozlabs.org/project/uboot/list/?series=91320
> > [2]: https://patchwork.ozlabs.org/project/uboot/list/?series=91125
> > 
> >  board/sifive/fu540/Kconfig | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/board/sifive/fu540/Kconfig
> > b/board/sifive/fu540/Kconfig index
> > 6be3d88144..d8a6020cf8 100644
> > --- a/board/sifive/fu540/Kconfig
> > +++ b/board/sifive/fu540/Kconfig
> > @@ -16,6 +16,9 @@ config SYS_TEXT_BASE
> >  	default 0x80000000 if !RISCV_SMODE
> >  	default 0x80200000 if RISCV_SMODE
> > 
> > +config MAIN_HART
> > +	default 1
> > +
> >  config BOARD_SPECIFIC_OPTIONS # dummy
> >  	def_bool y
> >  	select GENERIC_RISCV
> > @@ -38,5 +41,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
> >  	imply PHY_LIB
> >  	imply PHY_MSCC
> >  	imply SIFIVE_SERIAL
> > +	imply SMP
> > 
> >  endif
> > --
> > 2.20.1
> 
> It will be better if we can get rid off MAIN_HART config option.
> Otherwise, looks good to me.
> 
> Reviewed-by: Anup Patel <anup.patel@wdc.com>
> 

Thanks for your review, Anup!

I will update the patch to remove MAIN_HART together with the next
version of the SMP series.

Thanks,
Lukas

Patch

diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 6be3d88144..d8a6020cf8 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/fu540/Kconfig
@@ -16,6 +16,9 @@  config SYS_TEXT_BASE
 	default 0x80000000 if !RISCV_SMODE
 	default 0x80200000 if RISCV_SMODE
 
+config MAIN_HART
+	default 1
+
 config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select GENERIC_RISCV
@@ -38,5 +41,6 @@  config BOARD_SPECIFIC_OPTIONS # dummy
 	imply PHY_LIB
 	imply PHY_MSCC
 	imply SIFIVE_SERIAL
+	imply SMP
 
 endif