From patchwork Mon Feb 11 22:13:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Auer X-Patchwork-Id: 1040176 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aisec.fraunhofer.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43z0WQ16C3z9sCh for ; Tue, 12 Feb 2019 09:16:50 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D3646C2207D; Mon, 11 Feb 2019 22:15:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6DAA6C22085; Mon, 11 Feb 2019 22:14:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 13B34C22092; Mon, 11 Feb 2019 22:14:35 +0000 (UTC) Received: from mail-edgeS23.fraunhofer.de (mail-edges23.fraunhofer.de [153.97.7.23]) by lists.denx.de (Postfix) with ESMTPS id 22AF0C2202D for ; Mon, 11 Feb 2019 22:14:31 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2EKAAAO4PJb/xmnZsBiGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCA4FWOYxvix2ZQxSBZg2EbAKDbiI2Bw0BAwEBAgEBAgICaSiFPgYyAUYQUT0aBg4FgyGCAqh8ihwJAYdQhCuBVz+BEAGHVSRkhQ4CiwiUZwcCgRGBCQSOfgsYiViHJZgWgU0CMIFVMxokgzuQWz4BMgGOWwEB X-IPAS-Result: A2EKAAAO4PJb/xmnZsBiGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCA4FWOYxvix2ZQxSBZg2EbAKDbiI2Bw0BAwEBAgEBAgICaSiFPgYyAUYQUT0aBg4FgyGCAqh8ihwJAYdQhCuBVz+BEAGHVSRkhQ4CiwiUZwcCgRGBCQSOfgsYiViHJZgWgU0CMIFVMxokgzuQWz4BMgGOWwEB X-IronPort-AV: E=Sophos;i="5.56,253,1539640800"; d="scan'208";a="9182860" Received: from mail-mtadd25.fraunhofer.de ([192.102.167.25]) by mail-edgeS23.fraunhofer.de with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2019 23:14:30 +0100 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A0AaAAAq4PJb/xBhWMBiGwEBAQEDAQEBBwMBAQGBUwQBAQELAYM4ITmMb6RgFIFmDYRsAoQPNgcNAQMBAQIBAQJtKIU9BjIBRhBRPRoGDgWDIYICqHyKHQkBh1CGAj+BEAGHVSRkhQ4CiwiUZwcCgRGBCQSOfgsYiViHJZgWgU0CL4FVMxokgzuQWz4DMAGOWwEB X-IronPort-AV: E=Sophos;i="5.56,253,1539640800"; d="scan'208";a="31721292" Received: from fgdemucivp01ltm.xch.fraunhofer.de (HELO FGDEMUCIMP11EXC.ads.fraunhofer.de) ([192.88.97.16]) by mail-mtaDD25.fraunhofer.de with ESMTP/TLS/AES256-SHA; 11 Feb 2019 23:14:30 +0100 Received: from localhost.de (10.80.233.50) by FGDEMUCIMP11EXC.ads.fraunhofer.de (10.80.232.42) with Microsoft SMTP Server (TLS) id 14.3.435.0; Mon, 11 Feb 2019 23:16:19 +0100 From: Lukas Auer To: Date: Mon, 11 Feb 2019 23:13:40 +0100 Message-ID: <20190211221345.31980-4-lukas.auer@aisec.fraunhofer.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190211221345.31980-1-lukas.auer@aisec.fraunhofer.de> References: <20190211221345.31980-1-lukas.auer@aisec.fraunhofer.de> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-11.0.0.4179-8.200.1013-24422.005 X-TM-AS-Result: No--2.450500-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Cc: Palmer Dabbelt , Andreas Schwab , Alexander Graf Subject: [U-Boot] [PATCH 3/7] riscv: implement IPI platform functions using SBI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The supervisor binary interface (SBI) provides the necessary functions to implement the platform IPI functions riscv_send_ipi() and riscv_clear_ipi(). Use it to implement them. This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs running in supervisor mode. Support for machine mode is already available for CPUs that include the SiFive CLINT. Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng --- arch/riscv/Kconfig | 5 +++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/sbi_ipi.c | 25 +++++++++++++++++++++++++ 3 files changed, 31 insertions(+) create mode 100644 arch/riscv/lib/sbi_ipi.c diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c0842178dd..3a51339c4d 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -135,4 +135,9 @@ config NR_CPUS Stack memory is pre-allocated. U-Boot must therefore know the maximum number of CPUs that may be present. +config SBI_IPI + bool + default y if RISCV_SMODE + depends on SMP + endmenu diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 19370f9749..35dbf643e4 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_RISCV_RDTIME) += rdtime.o obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o obj-y += interrupts.o obj-y += reset.o +obj-$(CONFIG_SBI_IPI) += sbi_ipi.o obj-y += setjmp.o obj-$(CONFIG_SMP) += smp.o diff --git a/arch/riscv/lib/sbi_ipi.c b/arch/riscv/lib/sbi_ipi.c new file mode 100644 index 0000000000..170346da68 --- /dev/null +++ b/arch/riscv/lib/sbi_ipi.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Fraunhofer AISEC, + * Lukas Auer + */ + +#include +#include + +int riscv_send_ipi(int hart) +{ + ulong mask; + + mask = 1UL << hart; + sbi_send_ipi(&mask); + + return 0; +} + +int riscv_clear_ipi(int hart) +{ + sbi_clear_ipi(); + + return 0; +}