[v3,2/7] dt-bindings: bus: Add binding for the Allwinner MBUS controller

Message ID 43f965dae8b0ba8dffd3af478c2836c17feaa18b.1549897336.git-series.maxime.ripard@bootlin.com
State Changes Requested
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Series
  • sunxi: Add DT representation for the MBUS controller
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Commit Message

Maxime Ripard Feb. 11, 2019, 3:02 p.m.
The MBUS controller drives the MBUS that other devices in the SoC will
use to perform DMA. It also has a register interface that allows to
monitor and control the bandwidth and priorities for masters on that
bus.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---
 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | 36 +++++++-
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt

Comments

Robin Murphy Feb. 12, 2019, 6:53 p.m. | #1
On 11/02/2019 15:02, Maxime Ripard wrote:
> The MBUS controller drives the MBUS that other devices in the SoC will
> use to perform DMA. It also has a register interface that allows to
> monitor and control the bandwidth and priorities for masters on that
> bus.
> 
> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
> ---
>   Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | 36 +++++++-
>   1 file changed, 36 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
> new file mode 100644
> index 000000000000..e72b7ac9e359
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
> @@ -0,0 +1,36 @@
> +Allwinner Memory Bus (MBUS) controller
> +
> +The MBUS controller drives the MBUS that other devices in the SoC will
> +use to perform DMA. It also has a register interface that allows to
> +monitor and control the bandwidth and priorities for masters on that
> +bus.
> +
> +Required properties:
> + - compatible: Must be one of:
> +	- allwinner,sun5i-a13-mbus
> + - reg: Offset and length of the register set for the controller
> + - clocks: phandle to the clock driving the controller
> + - dma-ranges: see booting-without-of.txt

Nit: this is a standard property in DTSpec, so it's probably better to 
refer to that rather than Linux-specific documentation.

Robin.

> + - #interconnect-cells: Must be one, with the argument being the MBUS
> +   port ID
> +
> +Each device having to perform their DMA through the MBUS must have the
> +interconnects and interconnect-names properties set to the MBUS
> +controller and with "dma" as the interconnect name.
> +
> +Example:
> +
> +mbus: dram-controller@1c01000 {
> +	compatible = "allwinner,sun5i-a13-mbus";
> +	reg = <0x01c01000 0x1000>;
> +	clocks = <&ccu CLK_MBUS>;
> +	dma-ranges = <0x00000000 0x40000000 0x20000000>;
> +	#interconnect-cells = <1>;
> +};
> +
> +fe0: display-frontend@1e00000 {
> +	compatible = "allwinner,sun5i-a13-display-frontend";
> +	...
> +	interconnects = <&mbus 19>;
> +	interconnect-names = "dma";
> +};
>

Patch

diff --git a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
new file mode 100644
index 000000000000..e72b7ac9e359
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt
@@ -0,0 +1,36 @@ 
+Allwinner Memory Bus (MBUS) controller
+
+The MBUS controller drives the MBUS that other devices in the SoC will
+use to perform DMA. It also has a register interface that allows to
+monitor and control the bandwidth and priorities for masters on that
+bus.
+
+Required properties:
+ - compatible: Must be one of:
+	- allwinner,sun5i-a13-mbus
+ - reg: Offset and length of the register set for the controller
+ - clocks: phandle to the clock driving the controller
+ - dma-ranges: see booting-without-of.txt
+ - #interconnect-cells: Must be one, with the argument being the MBUS
+   port ID
+
+Each device having to perform their DMA through the MBUS must have the
+interconnects and interconnect-names properties set to the MBUS
+controller and with "dma" as the interconnect name.
+
+Example:
+
+mbus: dram-controller@1c01000 {
+	compatible = "allwinner,sun5i-a13-mbus";
+	reg = <0x01c01000 0x1000>;
+	clocks = <&ccu CLK_MBUS>;
+	dma-ranges = <0x00000000 0x40000000 0x20000000>;
+	#interconnect-cells = <1>;
+};
+
+fe0: display-frontend@1e00000 {
+	compatible = "allwinner,sun5i-a13-display-frontend";
+	...
+	interconnects = <&mbus 19>;
+	interconnect-names = "dma";
+};