[11/15] ARM: dts: imx6q-dmo-edmqmx6: Use explicit swpad values

Message ID 20190211141333.28725-11-u.kleine-koenig@pengutronix.de
State New
Headers show
Series
  • [01/15] ARM: dts: imx6qdl-fdi-fs700-m60: Use explicit swpad values
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Commit Message

Uwe Kleine-König Feb. 11, 2019, 2:13 p.m.
Instead of relying on reset defaults or a bootloader to configure
use explicit values for the swpad configuration. Here the reset
defaults are used owing to lack of other evidence.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

Patch

diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index ee8c38eee03b..ca686d7c7405 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -301,8 +301,8 @@ 
 	imx6q-dmo-edmqmx6 {
 		pinctrl_hog: hoggrp {
 			fsl,pins = <
-				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
-				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
+				MX6QDL_PAD_EIM_A16__GPIO2_IO22		0x0b0b1
+				MX6QDL_PAD_EIM_A17__GPIO2_IO21		0x0b0b1
 			>;
 		};
 
@@ -315,10 +315,10 @@ 
 
 		pinctrl_ecspi5: ecspi5rp-1 {
 			fsl,pins = <
-				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x80000000
-				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x80000000
-				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x80000000
-				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x80000000
+				MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x1b0b0
+				MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x1b0b0
+				MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x1b0b0
+				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12		0x1b0b0
 			>;
 		};
 
@@ -373,16 +373,16 @@ 
 
 		pinctrl_pfuze: pfuze100grp1 {
 			fsl,pins = <
-				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x80000000
+				MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x1b0b0
 			>;
 		};
 
 		pinctrl_stmpe1: stmpe1grp {
-			fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
+			fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 	0x1b0b0>;
 		};
 
 		pinctrl_stmpe2: stmpe2grp {
-			fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
+			fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02	0x0b0b1>;
 		};
 
 		pinctrl_uart1: uart1grp {