| Message ID | 20190211065937.4875-14-jagan@amarulasolutions.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | net: Add Allwinner EMAC CLK, RESET support | expand |
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 826650c89b..d8fdf7728e 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -12,14 +12,6 @@ void eth_init_board(void) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - /* Set up clock gating */ -#ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC); - setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC); -#else - setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); -#endif - /* Set MII clock */ #ifdef CONFIG_RGMII setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
Since Ethernet clock and reset is now handling via CLK and RESET frameworks via driver API's remove explicit ccm writes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- board/sunxi/gmac.c | 8 -------- 1 file changed, 8 deletions(-)