From patchwork Mon Feb 11 06:59:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1039668 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="fW51Pmih"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43ycCw18Fxz9s4Z for ; Mon, 11 Feb 2019 18:02:03 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id AA21EC21F47; Mon, 11 Feb 2019 07:00:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0A9AEC22078; Mon, 11 Feb 2019 07:00:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E1E03C21F63; Mon, 11 Feb 2019 07:00:09 +0000 (UTC) Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by lists.denx.de (Postfix) with ESMTPS id C5C24C21F98 for ; Mon, 11 Feb 2019 06:59:57 +0000 (UTC) Received: by mail-pg1-f193.google.com with SMTP id s198so4560764pgs.2 for ; Sun, 10 Feb 2019 22:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=THYMMBgn9FVTZ7GdQhe1XBunRIS30ACybde96Oqj5k0=; b=fW51Pmihi4CNX92GmRJVqMENtPKU43itiFFHA/+IcbkpwvYKLB3SbLXkO9UxG+PVeJ Wh4p9/IYo0+jgKwt5SlRsgjEdkE++cxejnk2+2FdmjAujqPqTWT731T7cFcqG/2Nv812 NpbTsIQubkH9ecDvmEIxmO16rZ1W/MEVTgfFI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=THYMMBgn9FVTZ7GdQhe1XBunRIS30ACybde96Oqj5k0=; b=TCSTsHMgCKxFJ4Uf+DEwecINYmMHfiQR0VZKZVIbwfGt6o0L3zGmPVuSE5yFMzchyQ YRzC4FJBaFXG2CLdD9yQpzzcyyC8n+LAie8yCLurl1inVaipQs0+BzqC7Biomj0jQ/F8 G8wrW70QsLHsS+HgGW6pt3lNFGHfYgT+eQjxY6ybjbt3BVJgx4of1EIVvKCj4hIrVQMd jRU4ePezf+dbpF3urJKnzpE3grGwrFJ4oNxXfVOdHAZch8LsEmKuqvnj8KJ26TWaBIiG j2Xgn0tPHTkpUuAsO1sUBHnikSp2kaIaW8MMmJjkwWPaFrd21L0k5nx8lTiteLIbl67m BpnA== X-Gm-Message-State: AHQUAuaLwZRNmMwdFmXYQoajaZ+JWjWAbMgHIyBpRJX6dzVkZqaSaLLh xIXpHSjkEc97TsBrmwBJ8krGJg== X-Google-Smtp-Source: AHgI3IYkW53lTZlNohFU9PbMwINE8Wo9jh/eW/VOvwGZ+MioUg/W9Uyw9xXOugBzgDito/6lGp14bQ== X-Received: by 2002:a62:b15:: with SMTP id t21mr36405080pfi.136.1549868396355; Sun, 10 Feb 2019 22:59:56 -0800 (PST) Received: from localhost.localdomain ([115.97.184.151]) by smtp.gmail.com with ESMTPSA id t3sm81529pga.31.2019.02.10.22.59.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 10 Feb 2019 22:59:55 -0800 (PST) From: Jagan Teki To: Maxime Ripard Date: Mon, 11 Feb 2019 12:29:27 +0530 Message-Id: <20190211065937.4875-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190211065937.4875-1-jagan@amarulasolutions.com> References: <20190211065937.4875-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, Joe Hershberger Subject: [U-Boot] [PATCH v2 03/13] net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandle X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Unlike other Allwinner SoC's R40 GMAC clock control register is locate in CCU, but rest located via syscon itself. Since the phandle property for current code look for 'syscon' and it will grab the respective ccu or syscon base address based on DT property defined in respective SoC dtsi. So, use the existing 'syscon' code even for R40 for retrieving GMAC clock via CCU and update the register directly in sun8i_emac_set_syscon instead of writing it separately using ccm base. Cc: Joe Hershberger Cc: Lothar Felten Signed-off-by: Jagan Teki --- drivers/net/sun8i_emac.c | 55 ++++++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 28 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index c9798445c7..a7fb7ac405 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -285,10 +285,18 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata, int ret; u32 reg; - reg = readl(priv->sysctl_reg + 0x30); + if (priv->variant == R40_GMAC) { + /* Select RGMII for R40 */ + reg = readl(priv->sysctl_reg + 0x164); + reg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | + CCM_GMAC_CTRL_GPIT_RGMII | + CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY); - if (priv->variant == R40_GMAC) + writel(reg, priv->sysctl_reg + 0x164); return 0; + } + + reg = readl(priv->sysctl_reg + 0x30); if (priv->variant == H3_EMAC) { ret = sun8i_emac_set_syscon_ephy(priv, ®); @@ -662,13 +670,6 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv) /* De-assert EMAC */ setbits_le32(&ccm->ahb_gate1, BIT(AHB_GATE_OFFSET_GMAC)); - - /* Select RGMII for R40 */ - setbits_le32(&ccm->gmac_clk_cfg, - CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | - CCM_GMAC_CTRL_GPIT_RGMII); - setbits_le32(&ccm->gmac_clk_cfg, - CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY)); } else { /* Set clock gating for emac */ setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC)); @@ -850,25 +851,23 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) return -EINVAL; } - if (priv->variant != R40_GMAC) { - offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); - if (offset < 0) { - debug("%s: cannot find syscon node\n", __func__); - return -EINVAL; - } - reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); - if (!reg) { - debug("%s: cannot find reg property in syscon node\n", - __func__); - return -EINVAL; - } - priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, - offset, reg); - if (priv->sysctl_reg == FDT_ADDR_T_NONE) { - debug("%s: Cannot find syscon base address\n", - __func__); - return -EINVAL; - } + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon"); + if (offset < 0) { + debug("%s: cannot find syscon node\n", __func__); + return -EINVAL; + } + + reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL); + if (!reg) { + debug("%s: cannot find reg property in syscon node\n", + __func__); + return -EINVAL; + } + priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob, + offset, reg); + if (priv->sysctl_reg == FDT_ADDR_T_NONE) { + debug("%s: Cannot find syscon base address\n", __func__); + return -EINVAL; } pdata->phy_interface = -1;