From patchwork Sat Feb 9 13:14:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1039182 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="R/sn7gJW"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43xXf61rD4z9sMl for ; Sun, 10 Feb 2019 00:17:34 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id DE828C21F6A; Sat, 9 Feb 2019 13:16:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 50C4FC21FFA; Sat, 9 Feb 2019 13:15:33 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DF7FCC21F68; Sat, 9 Feb 2019 13:15:22 +0000 (UTC) Received: from mail-pf1-f196.google.com (mail-pf1-f196.google.com [209.85.210.196]) by lists.denx.de (Postfix) with ESMTPS id 3B1D2C21FD0 for ; Sat, 9 Feb 2019 13:15:17 +0000 (UTC) Received: by mail-pf1-f196.google.com with SMTP id z9so3001774pfi.2 for ; Sat, 09 Feb 2019 05:15:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KGn1z06FMQEwh9upaaaOsNEalEgk7WQt+1FBJIKQ12Y=; b=R/sn7gJWJzA8FBNUIoXBgESTznycR3PUNZYfqRlMPaDRKhQHqK3UEfgmMT8o8jLnsO tvoUIzFKFTr3VLVONnw0y1gLqZvBIKATbO1DZp08GLmDtKa+VEVuhThPw2sQPQB/4ads AtOAIF0kZcpHKl4RMc8AlnZoK7nyx8PyBN97A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KGn1z06FMQEwh9upaaaOsNEalEgk7WQt+1FBJIKQ12Y=; b=ZaycAxeORbC5LAR+B0pE7p8fjX8Nx9W1sH75l5SSJEXOZGdsYWRT/RTHrxSaCmSRHC AmVPuWCnudr7unYv5LNDytBEsvrMDBmLjBEmog6ntqhLCSdano0LdmaI3kk83RD4u163 fl2r95f2yjJA+hy7bc0XbcOoy8LapjLf5m4pwWQ5MTBgFF9rZyqsjsFZAX9GYa4Cal5k 8D79jp/793SDfENEQfCPmA/8uZtgels1PBvkhmTMyZDm4c8HppVoVMBulDsPE8Bs6bKl Hg8KiHSJAyKKb7eLpiuI8vFDwk6a9zNTeFnLZK5GgGWmB6dKmMc0LV/6GNnwOs+x+N8T a4Cw== X-Gm-Message-State: AHQUAubaZ1yscgkuPfu7G2C4YjBlFG7NRZpb/oxWmNSO+AOuOsOwKu4I 82n/Hp/BFktKQHgX7YnCPtrGJg== X-Google-Smtp-Source: AHgI3IZ/fdp3C6y6pbF7OfgJXgFjnK4863vIjcY8+Hvq/1blEbWgGC26BrgLZN+1iCe1d6uOSsPNTQ== X-Received: by 2002:a63:451a:: with SMTP id s26mr25873426pga.150.1549718115808; Sat, 09 Feb 2019 05:15:15 -0800 (PST) Received: from localhost.localdomain ([115.97.184.151]) by smtp.gmail.com with ESMTPSA id z8sm6267013pgg.62.2019.02.09.05.15.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 09 Feb 2019 05:15:15 -0800 (PST) From: Jagan Teki To: Maxime Ripard Date: Sat, 9 Feb 2019 18:44:53 +0530 Message-Id: <20190209131500.29954-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190209131500.29954-1-jagan@amarulasolutions.com> References: <20190209131500.29954-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de, Stefan Mavrodiev Subject: [U-Boot] [PATCH 03/10] spi: sun4i: Simplify reg writes using set/clrbits_le32 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Update the existing register writes using setbits_le32 and clrbits_le32 in required places. Signed-off-by: Jagan Teki --- drivers/spi/sun4i_spi.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c index 87b396a96e..5446cebe7c 100644 --- a/drivers/spi/sun4i_spi.c +++ b/drivers/spi/sun4i_spi.c @@ -283,20 +283,18 @@ static int sun4i_spi_claim_bus(struct udevice *dev) { struct sun4i_spi_priv *priv = dev_get_priv(dev->parent); - writel(SUN4I_CTL_ENABLE | SUN4I_CTL_MASTER | SUN4I_CTL_TP | - SUN4I_CTL_CS_MANUAL | SUN4I_CTL_CS_ACTIVE_LOW, - &priv->regs->ctl); + setbits_le32(&priv->regs->ctl, SUN4I_CTL_ENABLE | + SUN4I_CTL_MASTER | SUN4I_CTL_TP | + SUN4I_CTL_CS_MANUAL | SUN4I_CTL_CS_ACTIVE_LOW); + return 0; } static int sun4i_spi_release_bus(struct udevice *dev) { struct sun4i_spi_priv *priv = dev_get_priv(dev->parent); - u32 reg; - reg = readl(&priv->regs->ctl); - reg &= ~SUN4I_CTL_ENABLE; - writel(reg, &priv->regs->ctl); + clrbits_le32(&priv->regs->ctl, SUN4I_CTL_ENABLE); return 0; } @@ -309,7 +307,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); u32 len = bitlen / 8; - u32 reg, rx_fifocnt; + u32 rx_fifocnt; u8 nbytes; int ret; @@ -324,10 +322,8 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, if (flags & SPI_XFER_BEGIN) sun4i_spi_set_cs(bus, slave_plat->cs, true); - reg = readl(&priv->regs->ctl); - /* Reset FIFOs */ - writel(reg | SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST, &priv->regs->ctl); + setbits_le32(&priv->regs->ctl, SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST); while (len) { /* Setup the transfer now... */ @@ -341,8 +337,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, sun4i_spi_fill_fifo(priv, nbytes); /* Start the transfer */ - reg = readl(&priv->regs->ctl); - writel(reg | SUN4I_CTL_XCH, &priv->regs->ctl); + setbits_le32(&priv->regs->ctl, SUN4I_CTL_XCH); /* Wait till RX FIFO to be empty */ ret = readl_poll_timeout(&priv->regs->ctl, rx_fifocnt,