| Message ID | 20190208083158.zfyy45lrdhco4bpn@gmail.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [v2] p8chip: Enable SRESET for P8 | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | master/apply_patch Successfully applied |
| snowpatch_ozlabs/build-multiarch | success | Test build-multiarch on branch master |
Artem Senichev's on February 8, 2019 6:31 pm: > Add possibility to use NMI SRESET signal to initiate memory dumping > with kdump. > Despite broken implementation of SRESET handler in OPAL it's possible to use > this signal in case of crash of the host OS. > https://lists.ozlabs.org/pipermail/openpower-firmware/2018-April/000220.html > > Signed-off-by: Artem Senichev <artemsen@gmail.com> Seems fine to me, if it's useful then I think it should be merged. Acked-by: Nicholas Piggin <npiggin@gmail.com> > --- > libpdbg/p8chip.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c > index 914c335..6ddec3e 100644 > --- a/libpdbg/p8chip.c > +++ b/libpdbg/p8chip.c > @@ -29,6 +29,7 @@ > #define RAS_STATUS_TIMEOUT 100 > > #define DIRECT_CONTROLS_REG 0x0 > +#define DIRECT_CONTROL_SP_SRESET PPC_BIT(60) > #define DIRECT_CONTROL_SP_STEP PPC_BIT(61) > #define DIRECT_CONTROL_SP_START PPC_BIT(62) > #define DIRECT_CONTROL_SP_STOP PPC_BIT(63) > @@ -339,8 +340,13 @@ static int p8_thread_start(struct thread *thread) > > static int p8_thread_sreset(struct thread *thread) > { > - /* Broken on p8 */ > - return 1; > + /* In some cases SRR1 register may end up being incorrect. > + * This means we can not return from the interrupt and continue, but we > + * should be able to go on to take a crash dump and restart the machine. */ > + PR_WARNING("SRESET handler has limited implementation on POWER8 platforms\n"); > + > + CHECK_ERR(pib_write(&thread->target, DIRECT_CONTROLS_REG, DIRECT_CONTROL_SP_SRESET)); > + return 0; > } > > static int p8_ram_setup(struct thread *thread) > -- > 2.20.1 > >
diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 914c335..6ddec3e 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -29,6 +29,7 @@ #define RAS_STATUS_TIMEOUT 100 #define DIRECT_CONTROLS_REG 0x0 +#define DIRECT_CONTROL_SP_SRESET PPC_BIT(60) #define DIRECT_CONTROL_SP_STEP PPC_BIT(61) #define DIRECT_CONTROL_SP_START PPC_BIT(62) #define DIRECT_CONTROL_SP_STOP PPC_BIT(63) @@ -339,8 +340,13 @@ static int p8_thread_start(struct thread *thread) static int p8_thread_sreset(struct thread *thread) { - /* Broken on p8 */ - return 1; + /* In some cases SRR1 register may end up being incorrect. + * This means we can not return from the interrupt and continue, but we + * should be able to go on to take a crash dump and restart the machine. */ + PR_WARNING("SRESET handler has limited implementation on POWER8 platforms\n"); + + CHECK_ERR(pib_write(&thread->target, DIRECT_CONTROLS_REG, DIRECT_CONTROL_SP_SRESET)); + return 0; } static int p8_ram_setup(struct thread *thread)
Add possibility to use NMI SRESET signal to initiate memory dumping with kdump. Despite broken implementation of SRESET handler in OPAL it's possible to use this signal in case of crash of the host OS. https://lists.ozlabs.org/pipermail/openpower-firmware/2018-April/000220.html Signed-off-by: Artem Senichev <artemsen@gmail.com> --- libpdbg/p8chip.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)