From patchwork Thu Jul 7 18:35:51 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 103721 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 09BA3B6F6B for ; Fri, 8 Jul 2011 04:36:18 +1000 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QetQo-000894-U2; Thu, 07 Jul 2011 18:36:11 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QetQo-0002bO-EX; Thu, 07 Jul 2011 18:36:10 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QetQl-0002b5-1Q for linux-arm-kernel@lists.infradead.org; Thu, 07 Jul 2011 18:36:08 +0000 Received: from e102144-lin.cambridge.arm.com (e102144-lin.cambridge.arm.com [10.1.69.60]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id p67IWsY3005753; Thu, 7 Jul 2011 19:32:54 +0100 (BST) Date: Thu, 7 Jul 2011 19:35:51 +0100 From: Will Deacon To: linux@arm.linux.org.uk Subject: [GIT PULL v2] Cortex-A5 and Cortex-A15 support Message-ID: <20110707183551.GD13534@e102144-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110707_143607_382429_BF1C6304 X-CRM114-Status: GOOD ( 12.89 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: dave.martin@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Hi Russell, Firstly, thanks for the quick turnaround on Dave's patches; much appreciated. Here's a new pull request for the updated branch. In case anybody's interested, the original pull request is here: http://lists.infradead.org/pipermail/linux-arm-kernel/2011-July/056547.html Cheers, Will The following changes since commit b0af8dfdd67699e25083478c63eedef2e72ebd85: Linus Torvalds (1): Linux 3.0-rc5 are available in the git repository at: git://linux-arm.org/linux-2.6-wd.git for-rmk Dave Martin (40): ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros ARM: assembler.h: Add string declaration macro ARM: mm: cache-fa: Use the new processor struct macros ARM: mm: cache-v3: Use the new processor struct macros ARM: mm: cache-v4: Use the new processor struct macros ARM: mm: cache-v4wb: Use the new processor struct macros ARM: mm: cache-v4wt: Use the new processor struct macros ARM: mm: cache-v6: Use the new processor struct macros ARM: mm: cache-v7: Use the new processor struct macros ARM: mm: proc-arm1020: Use the new processor struct macros ARM: mm: proc-arm1020e: Use the new processor struct macros ARM: mm: proc-arm1022: Use the new processor struct macros ARM: mm: proc-arm1026: Use the new processor struct macros ARM: mm: proc-arm6_7: Use the new processor struct macros ARM: mm: proc-arm720: Use the new processor struct macros ARM: mm: proc-arm740: Use the new processor struct macros ARM: mm: proc-arm7tdmi: Use the new processor struct macros ARM: mm: proc-arm920: Use the new processor struct macros ARM: mm: proc-arm922: Use the new processor struct macros ARM: mm: proc-arm925: Use the new processor struct macros ARM: mm: proc-arm926: Use the new processor struct macros ARM: mm: proc-arm940: Use the new processor struct macros ARM: mm: proc-arm946: Use the new processor struct macros ARM: mm: proc-arm9tdmi: Use the new processor struct macros ARM: mm: proc-fa526: Use the new processor struct macros ARM: mm: proc-feroceon: Use the new processor struct macros ARM: mm: proc-mohawk: Use the new processor struct macros ARM: mm: proc-sa110: Use the new processor struct macros ARM: mm: proc-sa1100: Use the new processor struct macros ARM: mm: proc-v6: Use the new processor struct macros ARM: mm: proc-v7: Use the new processor struct macros ARM: mm: proc-xsc3: Use new generic struct definition macros ARM: mm: proc-xscale: Use new generic struct definition macros ARM: mm: tlb-fa: Use the new processor struct macros ARM: mm: tlb-v3: Use the new processor struct macros ARM: mm: tlb-v4: Use the new processor struct macros ARM: mm: tlb-v4wb: Use the new processor struct macros ARM: mm: tlb-v4wbi: Use the new processor struct macros ARM: mm: tlb-v6: Use the new processor struct macros ARM: mm: tlb-v7: Use the new processor struct macros Pawel Moll (2): ARM: proc: convert v7 proc infos into a common macro ARM: proc: add Cortex-A5 proc info Will Deacon (10): Merge branch 'arm/proc-macros' of git://git.linaro.org/people/dmart/linux-2.6-arm into for-rmk ARM: hwcaps: use shifts instead of hardcoded constants ARM: hwcaps: add new HWCAP defines for ARMv7-A ARM: vfp: add VFPv4 capability detection and populate elf_hwcap ARM: proc: add proc info for Cortex-A15MP using classic page tables ARM: perf: remove confusing comment from v7 perf events backend ARM: perf: add PMUv2 common event definitions ARM: perf: add support for the Cortex-A5 PMU ARM: perf: add support for the Cortex-A15 PMU ARM: proc: add definition of cpu_reset for ARMv6 and ARMv7 cores arch/arm/include/asm/assembler.h | 9 + arch/arm/include/asm/hwcap.h | 36 ++-- arch/arm/include/asm/perf_event.h | 2 + arch/arm/kernel/perf_event.c | 6 + arch/arm/kernel/perf_event_v7.c | 344 +++++++++++++++++++++++-- arch/arm/kernel/setup.c | 4 + arch/arm/mm/cache-fa.S | 15 +- arch/arm/mm/cache-v3.S | 15 +- arch/arm/mm/cache-v4.S | 15 +- arch/arm/mm/cache-v4wb.S | 15 +- arch/arm/mm/cache-v4wt.S | 15 +- arch/arm/mm/cache-v6.S | 15 +- arch/arm/mm/cache-v7.S | 15 +- arch/arm/mm/proc-arm1020.S | 45 +--- arch/arm/mm/proc-arm1020e.S | 52 +---- arch/arm/mm/proc-arm1022.S | 52 +---- arch/arm/mm/proc-arm1026.S | 53 +---- arch/arm/mm/proc-arm6_7.S | 166 +++---------- arch/arm/mm/proc-arm720.S | 85 ++----- arch/arm/mm/proc-arm740.S | 42 +--- arch/arm/mm/proc-arm7tdmi.S | 216 +++------------- arch/arm/mm/proc-arm920.S | 53 +---- arch/arm/mm/proc-arm922.S | 53 +---- arch/arm/mm/proc-arm925.S | 88 ++------ arch/arm/mm/proc-arm926.S | 51 +---- arch/arm/mm/proc-arm940.S | 51 +---- arch/arm/mm/proc-arm946.S | 53 +---- arch/arm/mm/proc-arm9tdmi.S | 78 ++----- arch/arm/mm/proc-fa526.S | 38 +--- arch/arm/mm/proc-feroceon.S | 202 ++++----------- arch/arm/mm/proc-macros.S | 63 +++++ arch/arm/mm/proc-mohawk.S | 61 ++--- arch/arm/mm/proc-sa110.S | 39 +--- arch/arm/mm/proc-sa1100.S | 84 ++----- arch/arm/mm/proc-v6.S | 39 +-- arch/arm/mm/proc-v7.S | 136 +++++----- arch/arm/mm/proc-xsc3.S | 90 ++------ arch/arm/mm/proc-xscale.S | 507 ++++++------------------------------- arch/arm/mm/tlb-fa.S | 8 +- arch/arm/mm/tlb-v3.S | 8 +- arch/arm/mm/tlb-v4.S | 8 +- arch/arm/mm/tlb-v4wb.S | 8 +- arch/arm/mm/tlb-v4wbi.S | 8 +- arch/arm/mm/tlb-v6.S | 8 +- arch/arm/mm/tlb-v7.S | 9 +- arch/arm/vfp/vfpmodule.c | 6 +- 46 files changed, 913 insertions(+), 2053 deletions(-)