From patchwork Tue Feb 5 05:59:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 1036436 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="Wjcul51B"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43tv7L47h5z9sN9 for ; Tue, 5 Feb 2019 17:00:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3D09EC21F51; Tue, 5 Feb 2019 05:59:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D99E5C21F64; Tue, 5 Feb 2019 05:59:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B6644C21E56; Tue, 5 Feb 2019 05:59:10 +0000 (UTC) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lists.denx.de (Postfix) with ESMTPS id 5D259C21F5B for ; Tue, 5 Feb 2019 05:59:04 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x155wsCA078059; Mon, 4 Feb 2019 23:58:54 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1549346334; bh=Qhzs/HzvOy0TXX4e1RY1tWEuzx3ReEt0Es9v5fVkbzM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Wjcul51BXVmWozGmfNouzDQ3hI5UGe0i39nmA0SrpDApx++1AL/ysqTHJ7NZTbL8+ 5iswbiaP/yDmBN4XK0X2AuNw6DR1I3MTAZgQc368CnYpxiJCqDReIdkKcW7d0qGkbv l0DNJvAU5rV+QAvadB8Tk60T0qFrjvDY0a/CsI2k= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x155wspd102745 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 4 Feb 2019 23:58:54 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 4 Feb 2019 23:58:54 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 4 Feb 2019 23:58:54 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x155wVW6006226; Mon, 4 Feb 2019 23:58:49 -0600 From: Vignesh R To: Jagan Teki Date: Tue, 5 Feb 2019 11:29:12 +0530 Message-ID: <20190205055929.24168-4-vigneshr@ti.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205055929.24168-1-vigneshr@ti.com> References: <20190205055929.24168-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Marek Vasut , Tom Rini , Stefan Roese , Nobuhiro Iwamatsu , Boris Brezillon , Michal Simek , u-boot@lists.denx.de, Rajat Srivastava , Miquel Raynal Subject: [U-Boot] [PATCH v4 03/20] spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" SPI controllers support all types of SPI modes including dual/quad bus widths. Therefore remove constraint wrt SPI mode from spi-mem layer. Signed-off-by: Vignesh R Tested-by: Simon Goldschmidt Tested-by: Stefan Roese Tested-by: Horatiu Vultur Reviewed-by: Jagan Teki Tested-by: Jagan Teki #zynq-microzed --- drivers/spi/spi-mem.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index af9aef009a73..1da20b8de5c4 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -323,15 +323,6 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) return -EIO; #else - /* U-Boot does not support parallel SPI data lanes */ - if ((op->cmd.buswidth != 1) || - (op->addr.nbytes && op->addr.buswidth != 1) || - (op->dummy.nbytes && op->dummy.buswidth != 1) || - (op->data.nbytes && op->data.buswidth != 1)) { - printf("Dual/Quad raw SPI transfers not supported\n"); - return -ENOTSUPP; - } - if (op->data.nbytes) { if (op->data.dir == SPI_MEM_DATA_IN) rx_buf = op->data.buf.in;