Message ID | 0fb99213-05b9-13cb-aff3-5f9db50108bb@linux.vnet.ibm.com |
---|---|
State | New |
Headers | show |
Series | [rs6000] Fix instruction counts on powerpc64 test cases. | expand |
Hi Bill, On Mon, Feb 04, 2019 at 03:01:24PM -0600, Bill Seurer wrote: > [PATCH, rs6000] Fix instruction counts on powerpc64 test cases. > > This patch fixes the assembler instruction counts for some test cases > that started failing due to changes in code generation. The targets > were adjusted a bit as well to avoid generating BE/LE endian code on > unsupported platforms. > > Bootstrapped and tested on powerpc64le-unknown-linux-gnu (power 8 and > power 9) and powerpc64be-unknown-linux-gnu (power 7 and power 8) with > no regressions. Is this ok for trunk? > Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c > =================================================================== > --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (revision 268524) > +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (working copy) > @@ -1,28 +1,21 @@ > -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ > +/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */ > +/* Note: powerpc64-*-* is BE only. */ Target powerpc64-linux does not mean we are creating 64-bit code, or BE for that matter; nor the other way around. It just says what the default is. If you want to test only when generating code for 64-bit BE targets, use /* { dg-do compile { target { powerpc*-*-* && { lp64 && be } } } } */ But, powerpc*-*-* is guaranteed here anyway, so you can do just /* { dg-do compile { target { lp64 && be } } } */ > -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } > { "-mcpu=power7" } } */ > +/* { dg-skip-if "do not override -mcpu" { powerpc64-*-* } { "-mcpu=*" } > { "-mcpu=power7" } } */ Don't change this please; it was correct. It could also be /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ (for the same reason: everything in gcc.target/powerpc is only run for powerpc*-*-*). > /* Expected instruction counts for Power 7 */ > > /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ > /* { dg-final { scan-assembler-times "xvadddp" 1 } } */ > -/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */ > -/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */ > -/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be }} } */ > -/* { dg-final { scan-assembler-times "xvcmpeqdp." 5 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgtdp" 9 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgtdp." 9 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgedp" 6 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgedp" 7 { target be } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgedp." 6 { target le } } } */ > -/* { dg-final { scan-assembler-times "xvcmpgedp." 7 { target be } } } */ > +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */ > +/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */ > +/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */ > +/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 } } */ > +/* { dg-final { scan-assembler-times "xvcmpgtdp." 7 } } */ > +/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ > +/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */ > /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ > /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ > /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ Do we not want to test this on LE anymore? Oh, P7, heh. Okay. Not enough coffee yet :-) > +/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ > +/* { dg-final { scan-assembler-times "xvcmpgedp." 6 } } */ These need fixing still: both of these match xvcmpgedp 0,1,2 because dot means "any character", in a regexp. Maybe /* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 6 } } */ /* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */ (and with the counts fixed). (Same for all other dot insns of course). Segher
On 02/05/19 05:31, Segher Boessenkool wrote: > Do we not want to test this on LE anymore? Oh, P7, heh. Okay. Not > enough coffee yet :-) It will work if I specify -mbig-endian -mabi=elfv1 but yeah, we don't really care about P7 generating LE code. >> +/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ >> +/* { dg-final { scan-assembler-times "xvcmpgedp." 6 } } */ > These need fixing still: both of these match > xvcmpgedp 0,1,2 > because dot means "any character", in a regexp. Maybe > > /* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 6 } } */ > /* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */ > > (and with the counts fixed). (Same for all other dot insns of course). > A lot of these test cases (as in power-specific opcode tests) test for both OPCODE and OPCODE. which as you noted matches both. Many others just test for OPCODE (which will also match OPCODE.). I meant to ask if that was actually useful as they always matched the same thing either way. I will do the updates you recommended. Should I post the updated diffs or is this enough to submit the patch?
On Tue, Feb 05, 2019 at 08:58:44AM -0600, Bill Seurer wrote: > On 02/05/19 05:31, Segher Boessenkool wrote: > >Do we not want to test this on LE anymore? Oh, P7, heh. Okay. Not > >enough coffee yet :-) > > It will work if I specify -mbig-endian -mabi=elfv1 but yeah, we don't > really care about P7 generating LE code. > > >>+/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ > >>+/* { dg-final { scan-assembler-times "xvcmpgedp." 6 } } */ > >These need fixing still: both of these match > > xvcmpgedp 0,1,2 > >because dot means "any character", in a regexp. Maybe > > > >/* { dg-final { scan-assembler-times {\mxvcmpgedp\s} 6 } } */ > >/* { dg-final { scan-assembler-times {\mxvcmpgedp\.\s} 6 } } */ > > > >(and with the counts fixed). (Same for all other dot insns of course). > > > > A lot of these test cases (as in power-specific opcode tests) test for > both OPCODE and OPCODE. which as you noted matches both. Many others > just test for OPCODE (which will also match OPCODE.). I meant to ask if > that was actually useful as they always matched the same thing either way. > > I will do the updates you recommended. Should I post the updated diffs > or is this enough to submit the patch? Please repost. Do the "dot" things in a separate patch please, if you have those already anyway. Segher
Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (revision 268524) +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p7.c (working copy) @@ -1,28 +1,21 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */ +/* Note: powerpc64-*-* is BE only. */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2 -mcpu=power7 -dp" } */ -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc64-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ - /* Expected instruction counts for Power 7 */ /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ /* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */ -/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp" 5 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be }} } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp." 5 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp" 9 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp." 9 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp" 6 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp" 7 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp." 6 { target le } } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp." 7 { target be } } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp." 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */ /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c (revision 268524) +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p8.c (working copy) @@ -1,16 +1,15 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2 -mcpu=power8" } */ -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc64*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ - /* Expected instruction counts for Power 8. */ /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ /* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 8 { target le } } } */ -/* { dg-final { scan-assembler-times "xxlnor" 7 { target be } } } */ +/* { dg-final { scan-assembler-times "xxlnor" 6 { target le } } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 { target be } } } */ /* We generate xxlor instructions for many reasons other than or'ing vector operands or calling __builtin_vec_or(), which means we cannot rely on @@ -18,16 +17,16 @@ xxlor instruction was generated. */ /* { dg-final { scan-assembler "xxlor" } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp" 4 { target le } } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target le } } } */ /* { dg-final { scan-assembler-times "xvcmpeqdp" 6 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpeqdp." 4 { target le } } } */ +/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target le } } } */ /* { dg-final { scan-assembler-times "xvcmpeqdp." 6 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp" 7 { target le } } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target le } } } */ /* { dg-final { scan-assembler-times "xvcmpgtdp" 8 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgtdp." 7 { target le } } } */ +/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target le } } } */ /* { dg-final { scan-assembler-times "xvcmpgtdp." 8 { target be } } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */ -/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp" 6 } } */ +/* { dg-final { scan-assembler-times "xvcmpgedp." 6 } } */ /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */ /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */ /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */ Index: gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c (revision 268524) +++ gcc/testsuite/gcc.target/powerpc/vsx-vector-6.p9.c (working copy) @@ -1,14 +1,14 @@ -/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-do compile { target { powerpc64le-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-options "-mvsx -O2 -mcpu=power9" } */ -/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc64le*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* Expected instruction counts for Power9. */ /* { dg-final { scan-assembler-times "xvabsdp" 1 } } */ /* { dg-final { scan-assembler-times "xvadddp" 1 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 7 } } */ +/* { dg-final { scan-assembler-times "xxlnor" 5 } } */