| Message ID | 1309971881-3797-1-git-send-email-helmut.raiger@hale.at |
|---|---|
| State | Accepted |
| Commit | b4b1e769b8f6e80219da576d45a10c9e0ca5446b |
| Headers | show |
On 07/06/2011 07:04 PM, helmut.raiger@hale.at wrote: > From: Helmut Raiger<helmut.raiger@hale.at> > > When writing 0x4000 to the unlockend_blkaddr register, large writes to > a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF > to this register for V2 of the nand controller. > > However on an i.MX31 this also fixes writes larger than 32MB. > The datasheet is very unspecific, but (0x4000=16384)*2000 > roughly fits the limits we're encountering with NAND writes. > This problem might be NAND chip specific. Any comments? Helmut -- Scanned by MailScanner.
On Wed, 20 Jul 2011 08:55:00 +0200 Helmut Raiger <helmut.raiger@hale.at> wrote: > On 07/06/2011 07:04 PM, helmut.raiger@hale.at wrote: > > From: Helmut Raiger<helmut.raiger@hale.at> > > > > When writing 0x4000 to the unlockend_blkaddr register, large writes to > > a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF > > to this register for V2 of the nand controller. > > > > However on an i.MX31 this also fixes writes larger than 32MB. > > The datasheet is very unspecific, but (0x4000=16384)*2000 > > roughly fits the limits we're encountering with NAND writes. > > This problem might be NAND chip specific. > Any comments? I'll apply it (with a minor formatting fix), if nobody has any more specific information about this register. -Scott
On Wed, Jul 06, 2011 at 07:04:41PM +0200, helmut.raiger@hale.at wrote: > From: Helmut Raiger <helmut.raiger@hale.at> > > When writing 0x4000 to the unlockend_blkaddr register, large writes to > a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF > to this register for V2 of the nand controller. > > However on an i.MX31 this also fixes writes larger than 32MB. > The datasheet is very unspecific, but (0x4000=16384)*2000 > roughly fits the limits we're encountering with NAND writes. > This problem might be NAND chip specific. > > Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> > --- > drivers/mtd/nand/mxc_nand.c | 13 ++++++++++++- > 1 files changed, 12 insertions(+), 1 deletions(-) Applied to u-boot-nand-flash next -Scott
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 78e07cc..35e89a0 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -1371,7 +1371,18 @@ int board_nand_init(struct nand_chip *this) /* Blocks to be unlocked */ writew(0x0, &host->regs->nfc_unlockstart_blkaddr); - writew(0x4000, &host->regs->nfc_unlockend_blkaddr); + /* Originally (Freescale LTIB 2.6.21) 0x4000 was written to the + * unlockend_blkaddr, but the magic 0x4000 does not always work + * when writing more than some 32 megabytes (on 2k page nands) + * However 0xFFFF doesn't seem to have this kind + * of limitation (tried it back and forth several times). + * The linux kernel driver sets this to 0xFFFF for the v2 controller + * only, but probably this was not tested there for v1. + * The very same limitation seems to apply to this kernel driver. + * This might be NAND chip specific and the i.MX31 datasheet is + * extremely vague about the semantics of this register. + */ + writew(0xFFFF, &host->regs->nfc_unlockend_blkaddr); /* Unlock Block Command for given address range */ writew(0x4, &host->regs->nfc_wrprot);