From patchwork Fri Feb 1 16:16:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 1034890 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="fCVoMgsX"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43rj1B4PTlz9sDr for ; Sat, 2 Feb 2019 03:17:18 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730779AbfBAQRR (ORCPT ); Fri, 1 Feb 2019 11:17:17 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:15203 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730701AbfBAQRR (ORCPT ); Fri, 1 Feb 2019 11:17:17 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 01 Feb 2019 08:17:18 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 01 Feb 2019 08:17:16 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 01 Feb 2019 08:17:16 -0800 Received: from HQMAIL105.nvidia.com (172.20.187.12) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 1 Feb 2019 16:17:15 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 1 Feb 2019 16:17:16 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 01 Feb 2019 08:17:16 -0800 From: Joseph Lo To: Thierry Reding , Jonathan Hunter , Daniel Lezcano , Thomas Gleixner CC: , , Joseph Lo Subject: [PATCH V6 7/7] arm64: dts: tegra210-smaug: Enable CPU idle support Date: Sat, 2 Feb 2019 00:16:54 +0800 Message-ID: <20190201161654.18315-8-josephl@nvidia.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190201161654.18315-1-josephl@nvidia.com> References: <20190201161654.18315-1-josephl@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1549037839; bh=KKX7opIlZi4sNp0TWN9lWtA3B/u+Sja1UN/0vXiVkrw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=fCVoMgsXRdgb9YH41mWWZdH6nTKq2D/i98X1r4WIiqGA12LBnnQi/vuh7TNDMqF4W sfysyG1IniLAoMOSCCxA0ERWOgHhmPkUL49M3Bgplp4EzWZIXqPyI6CkfvmR6KRjcH 9jSuVb92hGu8GEibdyXJWcvjp43md/M6swG0qwOtVmXUw2Jlkezg/hDhDGvKMucPd/ dYWQKWt2EyKc9aDHZcLck0IGSI0YRqM239qi/oSGPFqxf2cYfsHaQEqZw2pw6HTbU7 33Yl7bsekw8VyypHbMbbi1tt3B359UEcDAH7/7It8chp1btNuAF36CgFp4vagQvv9Y WJ8mLj/nMqeKw== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable CPU idle support for Smaug platform. Signed-off-by: Joseph Lo Acked-by: Jon Hunter --- v6: * add ack tag from Jon. v5: * no change v4: * no change v3: * no change v2: * no change --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 5a67890cfb7a..da0eb4530acf 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1751,6 +1751,13 @@ cpu@3 { enable-method = "psci"; }; + + idle-states { + c7 { + arm,psci-suspend-param = <0x00010007>; + status = "okay"; + }; + }; }; gpio-keys {