From patchwork Fri Feb 1 13:28:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 1034757 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="I579FqRT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43rdGh5qzLz9sDr for ; Sat, 2 Feb 2019 00:28:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726514AbfBAN2n (ORCPT ); Fri, 1 Feb 2019 08:28:43 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:35253 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726190AbfBAN2n (ORCPT ); Fri, 1 Feb 2019 08:28:43 -0500 Received: by mail-wr1-f66.google.com with SMTP id r17so1135914wrp.2 for ; Fri, 01 Feb 2019 05:28:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wjbIwkQC/1CESx4l/5W0d931Bp+2Uav9p9oWdH9W1nw=; b=I579FqRTs0kpRYlnrpCRMxdD6uvtnSVS9UNZYuHayNyKNdexlDsnO61bz1fWclvzin FtcrbkV6tPig3em1kXYxy8ljLp/LIJZAuTsyxqPxEUUPeCQakCrM74ghYNgbztZ1Ak/X Zy7Wj2zSwnPuoXO7iwlZoVnyQRMQwisWIhL5r+1Uim4vV5NfkTGq7cc+c9pTwL+lGZkH ghA4zf1v/GXgcLiUsVcLww37iNEEd82iJMVCoFlwbuVCfc2/FlRr1Qyhq7LSgBWDVjMs mH5fGvmbQYgfqY7CTAmfqlf3iC7HKSaI6UnBOqHtu8I8tYVfkwxlsqT5UrTklPDA632l oR/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wjbIwkQC/1CESx4l/5W0d931Bp+2Uav9p9oWdH9W1nw=; b=sfsdEcNy3T8K3Qj+txyKxiYNBp9tTwDrU0xcnLj+yDm4f9KyBH1mLiWzblyk8bVwnR /7zoRe5vpES++r7k+0kzCAjow3354XPP1P6cbBgTTcGiEuVk/efRKj7sQ2UHEg28vYl2 rx1Ben8uDXIshWgRf6sia+O961f5sG7aX6PT4OUaNWG4sxF1UgVI0xJ1BuWNOXSPdanP Jqp7sYeWzyjVhimVy2D/NkGeQ8/Y0+GlpeGsJbj2KDJNLY4NPNfI5+AxuZKfjV+3BNt1 TaZamv5ZuGd4jpzWljEfi7cW4+Kdv6Gq2wnSeqN+5JZe37axRpSQzJ4SdiJjk9TqRmFx pz0g== X-Gm-Message-State: AJcUukccq1tHnc/ESkP5pXJUUHqwaH8krTa/lJ35ytkl/xuZRGZj8RXf ZuSBGfDHlLVFZJvzp737X50= X-Google-Smtp-Source: ALg8bN79dHou5QKijRD2zgoFHhS+Tx3n3yGSQNjsyMyZoMNfmKCni6k5qcMy+XKkzn0537dEo6QGUA== X-Received: by 2002:adf:fac6:: with SMTP id a6mr40894927wrs.53.1549027721119; Fri, 01 Feb 2019 05:28:41 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id g67sm3979178wmd.38.2019.02.01.05.28.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Feb 2019 05:28:40 -0800 (PST) From: Thierry Reding To: Thierry Reding Cc: Mikko Perttunen , Dmitry Osipenko , dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org Subject: [PATCH v3 01/16] gpu: host1x: Set up stream ID table Date: Fri, 1 Feb 2019 14:28:22 +0100 Message-Id: <20190201132837.12327-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190201132837.12327-1-thierry.reding@gmail.com> References: <20190201132837.12327-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Thierry Reding In order to enable the MMIO path stream ID protection provided by the incarnation of host1x found in Tegra186 and later, the host1x must be provided with the list of stream ID register offsets for each of its clients. Some clients (such as VIC) have multiple stream ID registers that are assumed to be contiguous. The host1x is programmed with the base offset and a limit which provide the range of registers that the host1x needs to monitor for writes. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/dev.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/gpu/host1x/dev.h | 8 ++++++++ 2 files changed, 46 insertions(+) diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 419d8929a98f..4c044ee54fe6 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -120,6 +120,15 @@ static const struct host1x_info host1x05_info = { .dma_mask = DMA_BIT_MASK(34), }; +static const struct host1x_sid_entry tegra186_sid_table[] = { + { + /* VIC */ + .base = 0x1af0, + .offset = 0x30, + .limit = 0x34 + }, +}; + static const struct host1x_info host1x06_info = { .nb_channels = 63, .nb_pts = 576, @@ -129,6 +138,17 @@ static const struct host1x_info host1x06_info = { .sync_offset = 0x0, .dma_mask = DMA_BIT_MASK(34), .has_hypervisor = true, + .num_sid_entries = ARRAY_SIZE(tegra186_sid_table), + .sid_table = tegra186_sid_table, +}; + +static const struct host1x_sid_entry tegra194_sid_table[] = { + { + /* VIC */ + .base = 0x1af0, + .offset = 0x30, + .limit = 0x34 + }, }; static const struct host1x_info host1x07_info = { @@ -140,6 +160,8 @@ static const struct host1x_info host1x07_info = { .sync_offset = 0x0, .dma_mask = DMA_BIT_MASK(40), .has_hypervisor = true, + .num_sid_entries = ARRAY_SIZE(tegra194_sid_table), + .sid_table = tegra194_sid_table, }; static const struct of_device_id host1x_of_match[] = { @@ -154,6 +176,19 @@ static const struct of_device_id host1x_of_match[] = { }; MODULE_DEVICE_TABLE(of, host1x_of_match); +static void host1x_setup_sid_table(struct host1x *host) +{ + const struct host1x_info *info = host->info; + unsigned int i; + + for (i = 0; i < info->num_sid_entries; i++) { + const struct host1x_sid_entry *entry = &info->sid_table[i]; + + host1x_hypervisor_writel(host, entry->offset, entry->base); + host1x_hypervisor_writel(host, entry->limit, entry->base + 4); + } +} + static int host1x_probe(struct platform_device *pdev) { struct host1x *host; @@ -316,6 +351,9 @@ static int host1x_probe(struct platform_device *pdev) host1x_debug_init(host); + if (host->info->has_hypervisor) + host1x_setup_sid_table(host); + err = host1x_register(host); if (err < 0) goto fail_deinit_intr; diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h index 36f44ffebe73..05216a7e4830 100644 --- a/drivers/gpu/host1x/dev.h +++ b/drivers/gpu/host1x/dev.h @@ -94,6 +94,12 @@ struct host1x_intr_ops { int (*free_syncpt_irq)(struct host1x *host); }; +struct host1x_sid_entry { + unsigned int base; + unsigned int offset; + unsigned int limit; +}; + struct host1x_info { unsigned int nb_channels; /* host1x: number of channels supported */ unsigned int nb_pts; /* host1x: number of syncpoints supported */ @@ -103,6 +109,8 @@ struct host1x_info { unsigned int sync_offset; /* offset of syncpoint registers */ u64 dma_mask; /* mask of addressable memory */ bool has_hypervisor; /* has hypervisor registers */ + unsigned int num_sid_entries; + const struct host1x_sid_entry *sid_table; }; struct host1x {