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[GIT,PULL] omap soc regression fixes for v5.0-rc cycle

Message ID pull-1548949376-511005@atomide.com
State New
Headers show
Series [GIT,PULL] omap soc regression fixes for v5.0-rc cycle | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v5.0/fixes-rc4

Message

Tony Lindgren Jan. 31, 2019, 3:44 p.m. UTC
From: "Tony Lindgren" <tony@atomide.com>

The following changes since commit 063c20e12f8bbbc10cabc2413606b140085beb62:

  ARM: dts: am335x-shc.dts: fix wrong cd pin level (2019-01-23 16:14:33 -0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v5.0/fixes-rc4

for you to fetch changes up to dc30e70391376ba3987aeb856ae6d9c0706534f1:

  ARM: OMAP2+: Variable "reg" in function omap4_dsi_mux_pads() could be uninitialized (2019-01-29 08:54:22 -0800)

----------------------------------------------------------------
SoC fixes for omaps for v5.0-rc cycle

This series contains two SoC regression fixes and one uninitialized
variable fix:

- Fix inverted nirq pin handling for omap5 that started producing
  warnings with earlier GIC direction checks and took a while to
  understand and confirm. Basically there are two sys_nirq pins
  that are bypassing peripheral modules and inverted automatically
  by the SoC and need to be handled with a custom irq_set_type()

- Recent ti-sysc changes caused a regression to the pwm-omap-dmtimer
  code where the device tree handling code for timer source clock
  gets confused. It looks like we can remove that code eventually,
  but for now we just drop a bogus pm_runtime_irq_safe() for the
  timers with the related quirks caused by pm_runtime_irq_safe(),
  and have the standard assigned-clocks and assigned-clock-parents
  deal with setting the source clock

- Fix potentially uninitialized value for display init code if
  regmap_read() fails

----------------------------------------------------------------
Tony Lindgren (5):
      clocksource: timer-ti-dm: Fix pwm dmtimer usage of fck reparenting
      ARM: OMAP5+: Fix inverted nirq pin interrupts with irq_set_type
      bus: ti-sysc: Fix timer handling with drop pm_runtime_irq_safe()
      ARM: dts: Configure clock parent for pwm vibra
      Merge branch 'pwm-dmtimer-fixes' into omap-for-v5.0/fixes-v2

Yizhuo (1):
      ARM: OMAP2+: Variable "reg" in function omap4_dsi_mux_pads() could be uninitialized

 arch/arm/boot/dts/omap4-droid4-xt894.dts  | 11 ++++++++++
 arch/arm/boot/dts/omap5-board-common.dtsi |  9 +++++---
 arch/arm/boot/dts/omap5-cm-t54.dts        | 12 ++++++++++-
 arch/arm/mach-omap2/display.c             |  7 +++++-
 arch/arm/mach-omap2/omap-wakeupgen.c      | 36 ++++++++++++++++++++++++++++++-
 drivers/bus/ti-sysc.c                     |  6 +++---
 drivers/clocksource/timer-ti-dm.c         |  5 ++++-
 7 files changed, 76 insertions(+), 10 deletions(-)

Comments

Arnd Bergmann Feb. 15, 2019, 12:40 p.m. UTC | #1
On Thu, Jan 31, 2019 at 4:44 PM Tony Lindgren <tony@atomide.com> wrote:
-----
> SoC fixes for omaps for v5.0-rc cycle
>
> This series contains two SoC regression fixes and one uninitialized
> variable fix:
>
> - Fix inverted nirq pin handling for omap5 that started producing
>   warnings with earlier GIC direction checks and took a while to
>   understand and confirm. Basically there are two sys_nirq pins
>   that are bypassing peripheral modules and inverted automatically
>   by the SoC and need to be handled with a custom irq_set_type()
>
> - Recent ti-sysc changes caused a regression to the pwm-omap-dmtimer
>   code where the device tree handling code for timer source clock
>   gets confused. It looks like we can remove that code eventually,
>   but for now we just drop a bogus pm_runtime_irq_safe() for the
>   timers with the related quirks caused by pm_runtime_irq_safe(),
>   and have the standard assigned-clocks and assigned-clock-parents
>   deal with setting the source clock
>
> - Fix potentially uninitialized value for display init code if
>   regmap_read() fails

Pulled into arm/fixes branch, thanks!

     Arnd