From patchwork Wed Jan 30 18:01:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Khalil Blaiech X-Patchwork-Id: 1033708 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mellanox.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43qWQz5Kjxz9s3q for ; Thu, 31 Jan 2019 05:02:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728081AbfA3SCA (ORCPT ); Wed, 30 Jan 2019 13:02:00 -0500 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:35925 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725446AbfA3SB7 (ORCPT ); Wed, 30 Jan 2019 13:01:59 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from kblaiech@mellanox.com) with ESMTPS (AES256-SHA encrypted); 30 Jan 2019 20:01:57 +0200 Received: from farm-0002.mtbu.labs.mlnx (farm-0002.mtbu.labs.mlnx [10.15.2.32]) by mtbu-labmailer.labs.mlnx (8.14.4/8.14.4) with ESMTP id x0UI1uuq021870; Wed, 30 Jan 2019 13:01:56 -0500 Received: (from kblaiech@localhost) by farm-0002.mtbu.labs.mlnx (8.14.7/8.13.8/Submit) id x0UI1uNL009716; Wed, 30 Jan 2019 13:01:56 -0500 From: Khalil Blaiech To: Rob Herring , Wolfram Sang , Wolfram Sang , David Woods Cc: Khalil Blaiech , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, arm-soc Subject: [PATCH v3 2/2] dt-bindings: i2c: I2C binding for Mellanox BlueField SoC Date: Wed, 30 Jan 2019 13:01:32 -0500 Message-Id: X-Mailer: git-send-email 2.1.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Added device tree bindings documentation for Mellanox BlueField I2C SMBus controller. Reviewed-by: David Woods Signed-off-by: Khalil Blaiech --- .../devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt | 71 ++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt new file mode 100644 index 0000000..db20b23 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt @@ -0,0 +1,71 @@ +Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs + +Required Properties: +- reg : address offset and length of the device registers. The + registers consists of a set of dedicated and shared + resources: + + 1: Smbus block registers. + 2: Cause master registers. + 3: Cause slave registers. + + The BlueField SoCs includes three I2C bus controllers; + the set of resources
must be defined + as follow: + + BlueField 1: + + * i2c bus 0: + <0x02804000 0x800> /* Smbus[0] */ + <0x02801200 0x020> /* Cause Master[0] */ + <0x02801260 0x020> /* Cause Slave[0] */ + + * i2c bus 1: + <0x02804800 0x800> /* Smbus[1] */ + <0x02801220 0x020> /* Cause Master[1] */ + <0x02801280 0x020> /* Cause Slave[1] */ + + * i2c bus 2: + <0x02805000 0x800> /* Smbus[2] */ + <0x02801240 0x020> /* Cause Master[2] */ + <0x028012a0 0x020> /* Cause Slave[2] */ + + BlueField 2: + + * i2c bus 0: + <0x02804000 0x800> /* Smbus[0] */ + <0x02801400 0x020> /* Cause Master[0] */ + <0x02801540 0x020> /* Cause Slave[0] */ + + * i2c bus 1: + <0x02804800 0x800> /* Smbus[1] */ + <0x02801420 0x020> /* Cause Master[1] */ + <0x02801560 0x020> /* Cause Slave[1] */ + + * i2c bus 2: + <0x02805000 0x800> /* Smbus[2] */ + <0x02801440 0x020> /* Cause Master[2] */ + <0x02801580 0x020> /* Cause Slave[2] */ + +- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". +- interrupts : interrupt number. + +Optional Properties: +- clock-frequency : bus frequency used to configure timing registers; + allowed values are 100000, 400000 and 1000000; + those are expressed in Hz. + +Example: + +aliases { + i2c0 = &i2c_0 +}; + +i2c_0: i2c { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; +};