| Message ID | 20190130035935.235565-35-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | x86: Add support for booting from TPL | expand |
On Wed, Jan 30, 2019 at 12:01 PM Simon Glass <sjg@chromium.org> wrote: > > There are quite a few variables which control where things appear in the > final ROM image. Add a flashmap in the documentation to make this easier > to figure out. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > doc/README.x86 | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
diff --git a/doc/README.x86 b/doc/README.x86 index fa49cb8b8a..d5224b7536 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -185,6 +185,20 @@ If you are using em100, then this command will flash write -Boot: em100 -s -d filename.rom -c W25Q64CV -r +Flash map for samus / broadwell: + + fffff800 SYS_X86_START16 + ffff0000 RESET_SEG_START + fffd8000 TPL_TEXT_BASE + fffa0000 X86_MRC_ADDR + fff90000 VGA_BIOS_ADDR + ffed0000 SYS_TEXT_BASE + ffea0000 X86_REFCODE_ADDR + ffe70000 SPL_TEXT_BASE + ffa00000 <spare> + ff801000 intel-me (address set by descriptor.bin) + ff800000 intel-descriptor + --- Intel Crown Bay specific instructions for bare mode:
There are quite a few variables which control where things appear in the final ROM image. Add a flashmap in the documentation to make this easier to figure out. Signed-off-by: Simon Glass <sjg@chromium.org> --- doc/README.x86 | 14 ++++++++++++++ 1 file changed, 14 insertions(+)