[U-Boot,14/20] imx8m: set BYPASS ID SWAP to avoid AXI bus errors
diff mbox series

Message ID 20190128094807.26532-15-peng.fan@nxp.com
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series
  • imx: add i.MX8MM support
Related show

Commit Message

Peng Fan Jan. 28, 2019, 9:39 a.m. UTC
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 2 ++
 1 file changed, 2 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5634bfb96a..f4239d3357 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -55,6 +55,8 @@  void enable_tzc380(void)
 	/* Enable TZASC and lock setting */
 	setbits_le32(&gpr->gpr[10], GPR_TZASC_EN);
 	setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK);
+	if (IS_ENABLED(CONFIG_IMX8MM))
+		setbits_le32(&gpr->gpr[10], BIT(1));
 }
 
 void set_wdog_reset(struct wdog_regs *wdog)