diff mbox series

Fix PR88739

Message ID alpine.LSU.2.20.1901280910060.23386@zhemvz.fhfr.qr
State New
Headers show
Series Fix PR88739 | expand

Commit Message

Richard Biener Jan. 28, 2019, 8:11 a.m. UTC 
This restricts BIT_FIELD_REFs we create to ones operating on
mode-precision entities (iff INTEGRAL_TYPE_P).  This avoids
issues with endianess when expanding them.

No testcase, BE folks have to come up with sth suitable for
the testsuite.

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk,
queued for backporting (w/o the checking hunks).

Richard.

2019-01-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/88739
	* tree-cfg.c (verify_types_in_gimple_reference): Verify
	BIT_FIELD_REFs only are applied to mode-precision operands
	when they are integral.
	(verify_gimple_assign_ternary): Likewise for BIT_INSERT_EXPR.
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Avoid generating
	BIT_FIELD_REFs of non-mode-precision integral operands.
diff mbox series

Patch

Index: gcc/tree-cfg.c
===================================================================
--- gcc/tree-cfg.c	(revision 268257)
+++ gcc/tree-cfg.c	(working copy)
@@ -3118,6 +3118,12 @@  verify_types_in_gimple_reference (tree e
 		     "match field size of BIT_FIELD_REF");
 	      return true;
 	    }
+	  if (INTEGRAL_TYPE_P (TREE_TYPE (op))
+	      && !type_has_mode_precision_p (TREE_TYPE (op)))
+	    {
+	      error ("BIT_FIELD_REF of non-mode-precision operand");
+	      return true;
+	    }
 	  if (!AGGREGATE_TYPE_P (TREE_TYPE (op))
 	      && maybe_gt (size + bitpos,
 			   tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (op)))))
@@ -4319,6 +4325,12 @@  verify_gimple_assign_ternary (gassign *s
 	  error ("invalid position or size in BIT_INSERT_EXPR");
 	  return true;
 	}
+      if (INTEGRAL_TYPE_P (rhs1_type)
+	  && !type_has_mode_precision_p (rhs1_type))
+	{
+	  error ("BIT_INSERT_EXPR into non-mode-precision operand");
+	  return true;
+	}
       if (INTEGRAL_TYPE_P (rhs1_type))
 	{
 	  unsigned HOST_WIDE_INT bitpos = tree_to_uhwi (rhs3);
Index: gcc/tree-ssa-sccvn.c
===================================================================
--- gcc/tree-ssa-sccvn.c	(revision 268257)
+++ gcc/tree-ssa-sccvn.c	(working copy)
@@ -2298,6 +2298,7 @@  vn_reference_lookup_3 (ao_ref *ref, tree
       base2 = get_ref_base_and_extent (gimple_assign_lhs (def_stmt),
 				       &offset2, &size2, &maxsize2,
 				       &reverse);
+      tree def_rhs = gimple_assign_rhs1 (def_stmt);
       if (!reverse
 	  && known_size_p (maxsize2)
 	  && known_eq (maxsize2, size2)
@@ -2309,11 +2310,13 @@  vn_reference_lookup_3 (ao_ref *ref, tree
 	     according to endianness.  */
 	  && (! INTEGRAL_TYPE_P (vr->type)
 	      || known_eq (ref->size, TYPE_PRECISION (vr->type)))
-	  && multiple_p (ref->size, BITS_PER_UNIT))
+	  && multiple_p (ref->size, BITS_PER_UNIT)
+	  && (! INTEGRAL_TYPE_P (TREE_TYPE (def_rhs))
+	      || type_has_mode_precision_p (TREE_TYPE (def_rhs))))
 	{
 	  gimple_match_op op (gimple_match_cond::UNCOND,
 			      BIT_FIELD_REF, vr->type,
-			      vn_valueize (gimple_assign_rhs1 (def_stmt)),
+			      vn_valueize (def_rhs),
 			      bitsize_int (ref->size),
 			      bitsize_int (offset - offset2));
 	  tree val = vn_nary_build_or_lookup (&op);