diff mbox series

[v3,1/8] target/ppc: implement complete set of Vsr* macros

Message ID 20190127090306.30826-2-mark.cave-ayland@ilande.co.uk
State New
Headers show
Series target/ppc: remove various endian hacks from int_helper.c | expand

Commit Message

Mark Cave-Ayland Jan. 27, 2019, 9:02 a.m. UTC
This prepares us for eliminating the use of direct array access within the VMX
instruction implementations.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/internal.h | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

David Gibson Jan. 28, 2019, 9:19 a.m. UTC | #1
On Sun, Jan 27, 2019 at 09:02:59AM +0000, Mark Cave-Ayland wrote:
> This prepares us for eliminating the use of direct array access within the VMX
> instruction implementations.
> 
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Applied to ppc-for-4.0.

> ---
>  target/ppc/internal.h | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/target/ppc/internal.h b/target/ppc/internal.h
> index c7c0f77dd6..f26a71ffcf 100644
> --- a/target/ppc/internal.h
> +++ b/target/ppc/internal.h
> @@ -206,16 +206,23 @@ EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
>  
>  #if defined(HOST_WORDS_BIGENDIAN)
>  #define VsrB(i) u8[i]
> +#define VsrSB(i) s8[i]
>  #define VsrH(i) u16[i]
> +#define VsrSH(i) s16[i]
>  #define VsrW(i) u32[i]
> +#define VsrSW(i) s32[i]
>  #define VsrD(i) u64[i]
> +#define VsrSD(i) s64[i]
>  #else
>  #define VsrB(i) u8[15 - (i)]
> +#define VsrSB(i) s8[15 - (i)]
>  #define VsrH(i) u16[7 - (i)]
> +#define VsrSH(i) s16[7 - (i)]
>  #define VsrW(i) u32[3 - (i)]
> +#define VsrSW(i) s32[3 - (i)]
>  #define VsrD(i) u64[1 - (i)]
> +#define VsrSD(i) s64[1 - (i)]
>  #endif
> -
>  static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
>  {
>      vsr->VsrD(0) = env->vsr[n].u64[0];
diff mbox series

Patch

diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index c7c0f77dd6..f26a71ffcf 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -206,16 +206,23 @@  EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
 
 #if defined(HOST_WORDS_BIGENDIAN)
 #define VsrB(i) u8[i]
+#define VsrSB(i) s8[i]
 #define VsrH(i) u16[i]
+#define VsrSH(i) s16[i]
 #define VsrW(i) u32[i]
+#define VsrSW(i) s32[i]
 #define VsrD(i) u64[i]
+#define VsrSD(i) s64[i]
 #else
 #define VsrB(i) u8[15 - (i)]
+#define VsrSB(i) s8[15 - (i)]
 #define VsrH(i) u16[7 - (i)]
+#define VsrSH(i) s16[7 - (i)]
 #define VsrW(i) u32[3 - (i)]
+#define VsrSW(i) s32[3 - (i)]
 #define VsrD(i) u64[1 - (i)]
+#define VsrSD(i) s64[1 - (i)]
 #endif
-
 static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
 {
     vsr->VsrD(0) = env->vsr[n].u64[0];