PCI: qcom: Don't deassert reset GPIO during probe

Message ID 20190125232616.25714-1-bjorn.andersson@linaro.org
State Accepted
Delegated to: Lorenzo Pieralisi
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Series
  • PCI: qcom: Don't deassert reset GPIO during probe
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Commit Message

Bjorn Andersson Jan. 25, 2019, 11:26 p.m.
Acquiring the reset GPIO low means that reset is being deasserted, this
is followed almost immediately with qcom_pcie_host_init() asserting it,
initializing it and then finally deasserting it again, for the link to
come up.

Some PCIe devices requires a minimum time between the initial deassert
and subsequent reset cycles. In a platform that boots with the reset
GPIO asserted this requirement is being violated by this deassert/assert
pulse.

Acquiring the reset GPIO high will prevent this by matching the state to
the subsequent asserted state.

Cc: stable@vger.kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Stanimir Varbanov Feb. 8, 2019, 2:54 p.m. | #1
Hi Bjorn,

Thanks for the patch!

On 1/26/19 1:26 AM, Bjorn Andersson wrote:
> Acquiring the reset GPIO low means that reset is being deasserted, this
> is followed almost immediately with qcom_pcie_host_init() asserting it,
> initializing it and then finally deasserting it again, for the link to
> come up.
> 
> Some PCIe devices requires a minimum time between the initial deassert
> and subsequent reset cycles. In a platform that boots with the reset
> GPIO asserted this requirement is being violated by this deassert/assert
> pulse.
> 
> Acquiring the reset GPIO high will prevent this by matching the state to
> the subsequent asserted state.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index d185ea5fe996..a7f703556790 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1228,7 +1228,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
>  
>  	pcie->ops = of_device_get_match_data(dev);
>  
> -	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);
> +	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
>  	if (IS_ERR(pcie->reset)) {
>  		ret = PTR_ERR(pcie->reset);
>  		goto err_pm_runtime_put;
> 

Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Lorenzo Pieralisi Feb. 13, 2019, 3:23 p.m. | #2
On Fri, Jan 25, 2019 at 03:26:16PM -0800, Bjorn Andersson wrote:
> Acquiring the reset GPIO low means that reset is being deasserted, this
> is followed almost immediately with qcom_pcie_host_init() asserting it,
> initializing it and then finally deasserting it again, for the link to
> come up.
> 
> Some PCIe devices requires a minimum time between the initial deassert
> and subsequent reset cycles. In a platform that boots with the reset
> GPIO asserted this requirement is being violated by this deassert/assert
> pulse.
> 
> Acquiring the reset GPIO high will prevent this by matching the state to
> the subsequent asserted state.
> 
> Cc: stable@vger.kernel.org

Missing Fixes: tag, please provide me one so that I can proceed.

Lorenzo

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index d185ea5fe996..a7f703556790 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1228,7 +1228,7 @@ static int qcom_pcie_probe(struct platform_device *pdev)
>  
>  	pcie->ops = of_device_get_match_data(dev);
>  
> -	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);
> +	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
>  	if (IS_ERR(pcie->reset)) {
>  		ret = PTR_ERR(pcie->reset);
>  		goto err_pm_runtime_put;
> -- 
> 2.18.0
>
Bjorn Andersson Feb. 19, 2019, 5:16 a.m. | #3
On Wed 13 Feb 07:23 PST 2019, Lorenzo Pieralisi wrote:

> On Fri, Jan 25, 2019 at 03:26:16PM -0800, Bjorn Andersson wrote:
> > Acquiring the reset GPIO low means that reset is being deasserted, this
> > is followed almost immediately with qcom_pcie_host_init() asserting it,
> > initializing it and then finally deasserting it again, for the link to
> > come up.
> > 
> > Some PCIe devices requires a minimum time between the initial deassert
> > and subsequent reset cycles. In a platform that boots with the reset
> > GPIO asserted this requirement is being violated by this deassert/assert
> > pulse.
> > 
> > Acquiring the reset GPIO high will prevent this by matching the state to
> > the subsequent asserted state.
> > 
> > Cc: stable@vger.kernel.org
> 
> Missing Fixes: tag, please provide me one so that I can proceed.
> 

This applies to the original commit introducing this driver, so:

Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")

Regards,
Bjorn
Lorenzo Pieralisi Feb. 19, 2019, 11:10 a.m. | #4
On Mon, Feb 18, 2019 at 09:16:03PM -0800, Bjorn Andersson wrote:
> On Wed 13 Feb 07:23 PST 2019, Lorenzo Pieralisi wrote:
> 
> > On Fri, Jan 25, 2019 at 03:26:16PM -0800, Bjorn Andersson wrote:
> > > Acquiring the reset GPIO low means that reset is being deasserted, this
> > > is followed almost immediately with qcom_pcie_host_init() asserting it,
> > > initializing it and then finally deasserting it again, for the link to
> > > come up.
> > > 
> > > Some PCIe devices requires a minimum time between the initial deassert
> > > and subsequent reset cycles. In a platform that boots with the reset
> > > GPIO asserted this requirement is being violated by this deassert/assert
> > > pulse.
> > > 
> > > Acquiring the reset GPIO high will prevent this by matching the state to
> > > the subsequent asserted state.
> > > 
> > > Cc: stable@vger.kernel.org
> > 
> > Missing Fixes: tag, please provide me one so that I can proceed.
> > 
> 
> This applies to the original commit introducing this driver, so:
> 
> Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")

Applied to pci/dwc for v5.1, thanks.

Lorenzo

Patch

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index d185ea5fe996..a7f703556790 100644
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1228,7 +1228,7 @@  static int qcom_pcie_probe(struct platform_device *pdev)
 
 	pcie->ops = of_device_get_match_data(dev);
 
-	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);
+	pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
 	if (IS_ERR(pcie->reset)) {
 		ret = PTR_ERR(pcie->reset);
 		goto err_pm_runtime_put;