From patchwork Wed Jan 23 10:14:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 1029856 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43l1XZ2WCfz9s9h for ; Wed, 23 Jan 2019 21:21:18 +1100 (AEDT) Received: from localhost ([127.0.0.1]:59751 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmFem-0005F8-5g for incoming@patchwork.ozlabs.org; Wed, 23 Jan 2019 05:21:16 -0500 Received: from eggs.gnu.org ([209.51.188.92]:34722) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmFZh-0001g9-Tc for qemu-devel@nongnu.org; Wed, 23 Jan 2019 05:16:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmFZf-0007R6-Pg for qemu-devel@nongnu.org; Wed, 23 Jan 2019 05:16:01 -0500 Received: from mx1.redhat.com ([209.132.183.28]:9874) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gmFZZ-0007Lw-1O; Wed, 23 Jan 2019 05:15:53 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 19B787F6BB; Wed, 23 Jan 2019 10:15:52 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-91.ams2.redhat.com [10.36.117.91]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7BAE56019F; Wed, 23 Jan 2019 10:15:49 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, shameerali.kolothum.thodi@huawei.com, imammedo@redhat.com, david@redhat.com Date: Wed, 23 Jan 2019 11:14:49 +0100 Message-Id: <20190123101458.12478-10-eric.auger@redhat.com> In-Reply-To: <20190123101458.12478-1-eric.auger@redhat.com> References: <20190123101458.12478-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 23 Jan 2019 10:15:52 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v5 09/18] hw/arm/virt: Implement kvm_type function for 4.0 machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drjones@redhat.com, dgilbert@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This patch implements the machine class kvm_type() callback. It returns the max IPA shift needed to implement the whole GPA range including the RAM and IO regions located beyond. The returned value in passed though the KVM_CREATE_VM ioctl and this allows KVM to set the stage2 tables dynamically. At this stage the RAM limit still is 255GB. Setting all the existing highmem IO regions beyond the RAM allows to have a single contiguous RAM region (initial RAM and possible hotpluggable device memory). That way we do not need to do invasive changes in the EDK2 FW to support a dynamic RAM base. Signed-off-by: Eric Auger --- hw/arm/virt.c | 30 ++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 1 + 2 files changed, 31 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ea1fb3ddfd..a89ffbf4d7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1771,6 +1771,32 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, return NULL; } +/* + * for arm64 kvm_type [7-0] encodes the IPA size shift + */ +static int virt_kvm_type(MachineState *ms, const char *type_str) +{ + VirtMachineState *vms = VIRT_MACHINE(ms); + int max_vm_phys_shift = kvm_arm_get_max_vm_phys_shift(ms); + int max_pa_shift; + + vms->extended_memmap = true; + /* device memory start/size aligned on 1GiB */ + vms->high_io_base = ROUND_UP(GiB + ms->ram_size, GiB) + + ROUND_UP(ms->maxram_size - ms->ram_size, GiB); + + max_pa_shift = 64 - clz64(vms->high_io_base + TiB); + + if (max_pa_shift > max_vm_phys_shift) { + error_report("-m and ,maxmem option values " + "require an IPA range (%d bits) larger than " + "the one supported by the host (%d bits)", + max_pa_shift, max_vm_phys_shift); + exit(1); + } + return max_pa_shift; +} + static void virt_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -1795,6 +1821,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) mc->cpu_index_to_instance_props = virt_cpu_index_to_props; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; + mc->kvm_type = virt_kvm_type; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler = virt_machine_get_hotplug_handler; hc->plug = virt_machine_device_plug_cb; @@ -1899,6 +1926,9 @@ static void virt_machine_3_1_options(MachineClass *mc) { virt_machine_4_0_options(mc); compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len); + + /* extended memory map is enabled from 4.0 onwards */ + mc->kvm_type = NULL; } DEFINE_VIRT_MACHINE(3, 1) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 3dc7a6c5d5..86d4c93120 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -132,6 +132,7 @@ typedef struct { uint32_t iommu_phandle; int psci_conduit; hwaddr high_io_base; + bool extended_memmap; } VirtMachineState; #define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)