@@ -229,8 +229,8 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
size_pio));
if (use_highmem) {
- hwaddr base_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].base;
- hwaddr size_mmio_high = memmap[VIRT_PCIE_MMIO_HIGH].size;
+ hwaddr base_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].base;
+ hwaddr size_mmio_high = memmap[VIRT_HIGH_PCIE_MMIO].size;
aml_append(rbuf,
aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
@@ -663,8 +663,8 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
gicr = acpi_data_push(table_data, sizeof(*gicr));
gicr->type = ACPI_APIC_GENERIC_REDISTRIBUTOR;
gicr->length = sizeof(*gicr);
- gicr->base_address = cpu_to_le64(memmap[VIRT_GIC_REDIST2].base);
- gicr->range_length = cpu_to_le32(memmap[VIRT_GIC_REDIST2].size);
+ gicr->base_address = cpu_to_le64(memmap[VIRT_HIGH_GIC_REDIST2].base);
+ gicr->range_length = cpu_to_le32(memmap[VIRT_HIGH_GIC_REDIST2].size);
}
if (its_class_name() && !vmc->no_its) {
@@ -29,6 +29,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qapi/error.h"
#include "hw/sysbus.h"
#include "hw/arm/arm.h"
@@ -149,11 +150,15 @@ static const MemMapEntry a15memmap[] = {
[VIRT_PCIE_PIO] = { 0x3eff0000, 0x00010000 },
[VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 },
[VIRT_MEM] = { 0x40000000, RAMLIMIT_BYTES },
+};
+
+/* Memory map beyond the RAM */
+static MemMapEntry extended_memmap[] = {
/* Additional 64 MB redist region (can contain up to 512 redistributors) */
- [VIRT_GIC_REDIST2] = { 0x4000000000ULL, 0x4000000 },
- [VIRT_PCIE_ECAM_HIGH] = { 0x4010000000ULL, 0x10000000 },
+ [VIRT_HIGH_GIC_REDIST2] = { 0x0, S_64MiB },
+ [VIRT_HIGH_PCIE_ECAM] = { S_256MiB, S_256MiB },
/* Second PCIe window, 512GB wide at the 512GB boundary */
- [VIRT_PCIE_MMIO_HIGH] = { 0x8000000000ULL, 0x8000000000ULL },
+ [VIRT_HIGH_PCIE_MMIO] = { S_512GiB, S_512GiB },
};
static const int a15irqmap[] = {
@@ -435,8 +440,8 @@ static void fdt_add_gic_node(VirtMachineState *vms)
2, vms->memmap[VIRT_GIC_DIST].size,
2, vms->memmap[VIRT_GIC_REDIST].base,
2, vms->memmap[VIRT_GIC_REDIST].size,
- 2, vms->memmap[VIRT_GIC_REDIST2].base,
- 2, vms->memmap[VIRT_GIC_REDIST2].size);
+ 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].base,
+ 2, vms->memmap[VIRT_HIGH_GIC_REDIST2].size);
}
if (vms->virt) {
@@ -584,7 +589,7 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
if (nb_redist_regions == 2) {
uint32_t redist1_capacity =
- vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
+ vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
qdev_prop_set_uint32(gicdev, "redist-region-count[1]",
MIN(smp_cpus - redist0_count, redist1_capacity));
@@ -601,7 +606,8 @@ static void create_gic(VirtMachineState *vms, qemu_irq *pic)
if (type == 3) {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base);
if (nb_redist_regions == 2) {
- sysbus_mmio_map(gicbusdev, 2, vms->memmap[VIRT_GIC_REDIST2].base);
+ sysbus_mmio_map(gicbusdev, 2,
+ vms->memmap[VIRT_HIGH_GIC_REDIST2].base);
}
} else {
sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_CPU].base);
@@ -1088,8 +1094,8 @@ static void create_pcie(VirtMachineState *vms, qemu_irq *pic)
{
hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;
hwaddr size_mmio = vms->memmap[VIRT_PCIE_MMIO].size;
- hwaddr base_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].base;
- hwaddr size_mmio_high = vms->memmap[VIRT_PCIE_MMIO_HIGH].size;
+ hwaddr base_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].base;
+ hwaddr size_mmio_high = vms->memmap[VIRT_HIGH_PCIE_MMIO].size;
hwaddr base_pio = vms->memmap[VIRT_PCIE_PIO].base;
hwaddr size_pio = vms->memmap[VIRT_PCIE_PIO].size;
hwaddr base_ecam, size_ecam;
@@ -1418,7 +1424,7 @@ static void machvirt_init(MachineState *machine)
*/
if (vms->gic_version == 3) {
virt_max_cpus = vms->memmap[VIRT_GIC_REDIST].size / GICV3_REDIST_SIZE;
- virt_max_cpus += vms->memmap[VIRT_GIC_REDIST2].size / GICV3_REDIST_SIZE;
+ virt_max_cpus += vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST_SIZE;
} else {
virt_max_cpus = GIC_NCPU;
}
@@ -1780,6 +1786,7 @@ static void virt_instance_init(Object *obj)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
+ int i;
/* EL3 is disabled by default on virt: this makes us consistent
* between KVM and TCG for this board, and it also allows us to
@@ -1842,7 +1849,18 @@ static void virt_instance_init(Object *obj)
"Valid values are none and smmuv3",
NULL);
- vms->memmap = a15memmap;
+ vms->memmap = extended_memmap;
+
+ for (i = 0; i < ARRAY_SIZE(a15memmap); i++) {
+ vms->memmap[i] = a15memmap[i];
+ }
+
+ vms->high_io_base = S_256GiB; /* Top of the RAM */
+
+ for (i = VIRT_LOWMEMMAP_LAST; i < ARRAY_SIZE(extended_memmap); i++) {
+ vms->memmap[i].base = extended_memmap[i].base + vms->high_io_base;
+ vms->memmap[i].size = extended_memmap[i].size;
+ }
vms->irqmap = a15irqmap;
}
@@ -64,7 +64,6 @@ enum {
VIRT_GIC_VCPU,
VIRT_GIC_ITS,
VIRT_GIC_REDIST,
- VIRT_GIC_REDIST2,
VIRT_SMMU,
VIRT_UART,
VIRT_MMIO,
@@ -74,12 +73,18 @@ enum {
VIRT_PCIE_MMIO,
VIRT_PCIE_PIO,
VIRT_PCIE_ECAM,
- VIRT_PCIE_ECAM_HIGH,
VIRT_PLATFORM_BUS,
- VIRT_PCIE_MMIO_HIGH,
VIRT_GPIO,
VIRT_SECURE_UART,
VIRT_SECURE_MEM,
+ VIRT_LOWMEMMAP_LAST,
+};
+
+/* indices of IO regions located after the RAM */
+enum {
+ VIRT_HIGH_GIC_REDIST2 = VIRT_LOWMEMMAP_LAST,
+ VIRT_HIGH_PCIE_ECAM,
+ VIRT_HIGH_PCIE_MMIO,
};
typedef enum VirtIOMMUType {
@@ -116,7 +121,7 @@ typedef struct {
int32_t gic_version;
VirtIOMMUType iommu;
struct arm_boot_info bootinfo;
- const MemMapEntry *memmap;
+ MemMapEntry *memmap;
const int *irqmap;
int smp_cpus;
void *fdt;
@@ -126,9 +131,10 @@ typedef struct {
uint32_t msi_phandle;
uint32_t iommu_phandle;
int psci_conduit;
+ hwaddr high_io_base;
} VirtMachineState;
-#define VIRT_ECAM_ID(high) (high ? VIRT_PCIE_ECAM_HIGH : VIRT_PCIE_ECAM)
+#define VIRT_ECAM_ID(high) (high ? VIRT_HIGH_PCIE_ECAM : VIRT_PCIE_ECAM)
#define TYPE_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
#define VIRT_MACHINE(obj) \
In the prospect to introduce an extended memory map supporting more RAM, let's split the memory map array into two parts: - the former a15memmap contains regions below and including the RAM - extended_memmap, only initialized with entries located after the RAM. the base address of each entry is an offset relative to the top of the RAM. This new split will allow to grow the RAM size without chaanging the static description of the high regions. At that point the memory map is not changed. Signed-off-by: Eric Auger <eric.auger@redhat.com> --- hw/arm/virt-acpi-build.c | 8 ++++---- hw/arm/virt.c | 40 +++++++++++++++++++++++++++++----------- include/hw/arm/virt.h | 16 +++++++++++----- 3 files changed, 44 insertions(+), 20 deletions(-)