Patchwork [sparc64] fix cpu_cc_src and cpu_cc_src2 corruption in udivx and sdivx

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Submitter Artyom Tarasenko
Date July 1, 2011, 7:28 p.m.
Message ID <78deacb7abc46e23598060dadfb217e7fd5d0166.1309548174.git.atar4qemu@gmail.com>
Download mbox | patch
Permalink /patch/102950/
State New
Headers show

Comments

Artyom Tarasenko - July 1, 2011, 7:28 p.m.
udivx and sdvix don't modify condition flags, so they shall not
overwrite cpu_cc_*

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
 target-sparc/translate.c |   32 ++++++++++++++++++++++----------
 1 files changed, 22 insertions(+), 10 deletions(-)
Laurent Desnogues - July 1, 2011, 9:16 p.m.
On Fri, Jul 1, 2011 at 9:28 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
> udivx and sdvix don't modify condition flags, so they shall not
> overwrite cpu_cc_*

Looks good to me.


Laurent

> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
> ---
>  target-sparc/translate.c |   32 ++++++++++++++++++++++----------
>  1 files changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/target-sparc/translate.c b/target-sparc/translate.c
> index 992cd77..f32a674 100644
> --- a/target-sparc/translate.c
> +++ b/target-sparc/translate.c
> @@ -727,19 +727,24 @@ static inline void gen_trap_ifdivzero_tl(TCGv divisor)
>  static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
>  {
>     int l1, l2;
> +    TCGv r_temp1, r_temp2;
>
>     l1 = gen_new_label();
>     l2 = gen_new_label();
> -    tcg_gen_mov_tl(cpu_cc_src, src1);
> -    tcg_gen_mov_tl(cpu_cc_src2, src2);
> -    gen_trap_ifdivzero_tl(cpu_cc_src2);
> -    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
> -    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
> +    r_temp1 = tcg_temp_local_new();
> +    r_temp2 = tcg_temp_local_new();
> +    tcg_gen_mov_tl(r_temp1, src1);
> +    tcg_gen_mov_tl(r_temp2, src2);
> +    gen_trap_ifdivzero_tl(r_temp2);
> +    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp1, INT64_MIN, l1);
> +    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp2, -1, l1);
>     tcg_gen_movi_i64(dst, INT64_MIN);
>     tcg_gen_br(l2);
>     gen_set_label(l1);
> -    tcg_gen_div_i64(dst, cpu_cc_src, cpu_cc_src2);
> +    tcg_gen_div_i64(dst, r_temp1, r_temp2);
>     gen_set_label(l2);
> +    tcg_temp_free(r_temp1);
> +    tcg_temp_free(r_temp2);
>  }
>  #endif
>
> @@ -3173,10 +3178,17 @@ static void disas_sparc_insn(DisasContext * dc)
>                         break;
>  #ifdef TARGET_SPARC64
>                     case 0xd: /* V9 udivx */
> -                        tcg_gen_mov_tl(cpu_cc_src, cpu_src1);
> -                        tcg_gen_mov_tl(cpu_cc_src2, cpu_src2);
> -                        gen_trap_ifdivzero_tl(cpu_cc_src2);
> -                        tcg_gen_divu_i64(cpu_dst, cpu_cc_src, cpu_cc_src2);
> +                        {
> +                            TCGv r_temp1, r_temp2;
> +                            r_temp1 = tcg_temp_local_new();
> +                            r_temp2 = tcg_temp_local_new();
> +                            tcg_gen_mov_tl(r_temp1, cpu_src1);
> +                            tcg_gen_mov_tl(r_temp2, cpu_src2);
> +                            gen_trap_ifdivzero_tl(r_temp2);
> +                            tcg_gen_divu_i64(cpu_dst, r_temp1, r_temp2);
> +                            tcg_temp_free(r_temp1);
> +                            tcg_temp_free(r_temp2);
> +                        }
>                         break;
>  #endif
>                     case 0xe: /* udiv */
> --
> 1.7.3.4
>
>
Blue Swirl - July 1, 2011, 9:40 p.m.
Thanks, applied.

On Fri, Jul 1, 2011 at 10:28 PM, Artyom Tarasenko <atar4qemu@gmail.com> wrote:
> udivx and sdvix don't modify condition flags, so they shall not
> overwrite cpu_cc_*
>
> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
> ---
>  target-sparc/translate.c |   32 ++++++++++++++++++++++----------
>  1 files changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/target-sparc/translate.c b/target-sparc/translate.c
> index 992cd77..f32a674 100644
> --- a/target-sparc/translate.c
> +++ b/target-sparc/translate.c
> @@ -727,19 +727,24 @@ static inline void gen_trap_ifdivzero_tl(TCGv divisor)
>  static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
>  {
>     int l1, l2;
> +    TCGv r_temp1, r_temp2;
>
>     l1 = gen_new_label();
>     l2 = gen_new_label();
> -    tcg_gen_mov_tl(cpu_cc_src, src1);
> -    tcg_gen_mov_tl(cpu_cc_src2, src2);
> -    gen_trap_ifdivzero_tl(cpu_cc_src2);
> -    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
> -    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
> +    r_temp1 = tcg_temp_local_new();
> +    r_temp2 = tcg_temp_local_new();
> +    tcg_gen_mov_tl(r_temp1, src1);
> +    tcg_gen_mov_tl(r_temp2, src2);
> +    gen_trap_ifdivzero_tl(r_temp2);
> +    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp1, INT64_MIN, l1);
> +    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp2, -1, l1);
>     tcg_gen_movi_i64(dst, INT64_MIN);
>     tcg_gen_br(l2);
>     gen_set_label(l1);
> -    tcg_gen_div_i64(dst, cpu_cc_src, cpu_cc_src2);
> +    tcg_gen_div_i64(dst, r_temp1, r_temp2);
>     gen_set_label(l2);
> +    tcg_temp_free(r_temp1);
> +    tcg_temp_free(r_temp2);
>  }
>  #endif
>
> @@ -3173,10 +3178,17 @@ static void disas_sparc_insn(DisasContext * dc)
>                         break;
>  #ifdef TARGET_SPARC64
>                     case 0xd: /* V9 udivx */
> -                        tcg_gen_mov_tl(cpu_cc_src, cpu_src1);
> -                        tcg_gen_mov_tl(cpu_cc_src2, cpu_src2);
> -                        gen_trap_ifdivzero_tl(cpu_cc_src2);
> -                        tcg_gen_divu_i64(cpu_dst, cpu_cc_src, cpu_cc_src2);
> +                        {
> +                            TCGv r_temp1, r_temp2;
> +                            r_temp1 = tcg_temp_local_new();
> +                            r_temp2 = tcg_temp_local_new();
> +                            tcg_gen_mov_tl(r_temp1, cpu_src1);
> +                            tcg_gen_mov_tl(r_temp2, cpu_src2);
> +                            gen_trap_ifdivzero_tl(r_temp2);
> +                            tcg_gen_divu_i64(cpu_dst, r_temp1, r_temp2);
> +                            tcg_temp_free(r_temp1);
> +                            tcg_temp_free(r_temp2);
> +                        }
>                         break;
>  #endif
>                     case 0xe: /* udiv */
> --
> 1.7.3.4
>
>

Patch

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 992cd77..f32a674 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -727,19 +727,24 @@  static inline void gen_trap_ifdivzero_tl(TCGv divisor)
 static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
 {
     int l1, l2;
+    TCGv r_temp1, r_temp2;
 
     l1 = gen_new_label();
     l2 = gen_new_label();
-    tcg_gen_mov_tl(cpu_cc_src, src1);
-    tcg_gen_mov_tl(cpu_cc_src2, src2);
-    gen_trap_ifdivzero_tl(cpu_cc_src2);
-    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
-    tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
+    r_temp1 = tcg_temp_local_new();
+    r_temp2 = tcg_temp_local_new();
+    tcg_gen_mov_tl(r_temp1, src1);
+    tcg_gen_mov_tl(r_temp2, src2);
+    gen_trap_ifdivzero_tl(r_temp2);
+    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp1, INT64_MIN, l1);
+    tcg_gen_brcondi_tl(TCG_COND_NE, r_temp2, -1, l1);
     tcg_gen_movi_i64(dst, INT64_MIN);
     tcg_gen_br(l2);
     gen_set_label(l1);
-    tcg_gen_div_i64(dst, cpu_cc_src, cpu_cc_src2);
+    tcg_gen_div_i64(dst, r_temp1, r_temp2);
     gen_set_label(l2);
+    tcg_temp_free(r_temp1);
+    tcg_temp_free(r_temp2);
 }
 #endif
 
@@ -3173,10 +3178,17 @@  static void disas_sparc_insn(DisasContext * dc)
                         break;
 #ifdef TARGET_SPARC64
                     case 0xd: /* V9 udivx */
-                        tcg_gen_mov_tl(cpu_cc_src, cpu_src1);
-                        tcg_gen_mov_tl(cpu_cc_src2, cpu_src2);
-                        gen_trap_ifdivzero_tl(cpu_cc_src2);
-                        tcg_gen_divu_i64(cpu_dst, cpu_cc_src, cpu_cc_src2);
+                        {
+                            TCGv r_temp1, r_temp2;
+                            r_temp1 = tcg_temp_local_new();
+                            r_temp2 = tcg_temp_local_new();
+                            tcg_gen_mov_tl(r_temp1, cpu_src1);
+                            tcg_gen_mov_tl(r_temp2, cpu_src2);
+                            gen_trap_ifdivzero_tl(r_temp2);
+                            tcg_gen_divu_i64(cpu_dst, r_temp1, r_temp2);
+                            tcg_temp_free(r_temp1);
+                            tcg_temp_free(r_temp2);
+                        }
                         break;
 #endif
                     case 0xe: /* udiv */