From patchwork Tue Jan 22 15:59:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ram Pai X-Patchwork-Id: 1029380 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=kvm-ppc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=us.ibm.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kY7Z38tyz9sDL for ; Wed, 23 Jan 2019 03:01:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728784AbfAVQB3 (ORCPT ); Tue, 22 Jan 2019 11:01:29 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:58254 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728848AbfAVQB3 (ORCPT ); Tue, 22 Jan 2019 11:01:29 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x0MFtlt8096651 for ; Tue, 22 Jan 2019 11:01:28 -0500 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0b-001b2d01.pphosted.com with ESMTP id 2q64k3d2ne-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 22 Jan 2019 11:01:27 -0500 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 22 Jan 2019 16:01:19 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x0MG1BDR9044330 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Jan 2019 16:01:11 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 44D11A4053; Tue, 22 Jan 2019 16:01:11 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A0B79A4065; Tue, 22 Jan 2019 16:01:07 +0000 (GMT) Received: from ram.ibm.com (unknown [9.85.201.166]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 22 Jan 2019 16:01:07 +0000 (GMT) From: Ram Pai To: kvm-ppc@vger.kernel.org Cc: cclaudio@br.ibm.com, maddy@linux.vnet.ibm.com, rgrimm@us.ibm.com, pmac@au1.ibm.com, andmike@us.ibm.com, sukadev@linux.vnet.ibm.com, bauerman@linux.ibm.com, santosh@linux.ibm.com, benh@linux.ibm.com, sesmith@au1.ibm.com, bharata@linux.ibm.com Subject: [PATCH 13/13] KVM: PPC: Ultravisor: Have fast_guest_return check secure_guest Date: Tue, 22 Jan 2019 07:59:44 -0800 X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1548172784-27414-13-git-send-email-linuxram@us.ibm.com> References: <1548172784-27414-1-git-send-email-linuxram@us.ibm.com> <1548172784-27414-2-git-send-email-linuxram@us.ibm.com> <1548172784-27414-3-git-send-email-linuxram@us.ibm.com> <1548172784-27414-4-git-send-email-linuxram@us.ibm.com> <1548172784-27414-5-git-send-email-linuxram@us.ibm.com> <1548172784-27414-6-git-send-email-linuxram@us.ibm.com> <1548172784-27414-7-git-send-email-linuxram@us.ibm.com> <1548172784-27414-8-git-send-email-linuxram@us.ibm.com> <1548172784-27414-9-git-send-email-linuxram@us.ibm.com> <1548172784-27414-10-git-send-email-linuxram@us.ibm.com> <1548172784-27414-11-git-send-email-linuxram@us.ibm.com> <1548172784-27414-12-git-send-email-linuxram@us.ibm.com> <1548172784-27414-13-git-send-email-linuxram@us.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19012216-0028-0000-0000-0000033C9840 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19012216-0029-0000-0000-000023F9D2AF Message-Id: <1548172784-27414-14-git-send-email-linuxram@us.ibm.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-01-22_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=858 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1901220124 Sender: kvm-ppc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm-ppc@vger.kernel.org From: Sukadev Bhattiprolu fast_guest_return checks if HSRR1 has the MSR_S bit set to determine if we should return to UV. The problem is that when a new CPU starts up (in response to a RTAS start-cpu call), it will not have the MSR_S bit set in HSRR1 yet so the new CPU will not enter UV. Have fast_guest_return check the kvm_arch.secure_guest field instead so even the new CPU will enter UV. Thanks to input from Paul Mackerras, Ram Pai, Mike Anderson. Signed-off-by: Sukadev Bhattiprolu --- arch/powerpc/include/asm/kvm_host.h | 1 + arch/powerpc/kernel/asm-offsets.c | 1 + arch/powerpc/kvm/book3s_hv_rmhandlers.S | 12 +++++++----- 3 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index 0f98f00..162005a 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h @@ -288,6 +288,7 @@ struct kvm_arch { cpumask_t cpu_in_guest; u8 radix; u8 fwnmi_enabled; + u8 secure_guest; bool threads_indep; bool nested_enable; pgd_t *pgtable; diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index 9ffc72d..05f8a79 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -495,6 +495,7 @@ int main(void) OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v); OFFSET(KVM_RADIX, kvm, arch.radix); OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled); + OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest); OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr); OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar); OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr); diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 627b823..b1710c8 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -1099,7 +1099,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) ld r2, VCPU_GPR(R2)(r4) ld r3, VCPU_GPR(R3)(r4) ld r5, VCPU_GPR(R5)(r4) - ld r7, VCPU_GPR(R7)(r4) ld r8, VCPU_GPR(R8)(r4) ld r9, VCPU_GPR(R9)(r4) ld r10, VCPU_GPR(R10)(r4) @@ -1117,13 +1116,15 @@ BEGIN_FTR_SECTION mtspr SPRN_HDSISR, r0 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) - mfspr r6, SPRN_HSRR1 - andis. r6, r6, MSR_S@high - bne ret_to_ultra + ld r6, VCPU_KVM(r4) + lbz r7, KVM_SECURE_GUEST(r6) + cmpdi r7, 1 + beq ret_to_ultra lwz r6, VCPU_CR(r4) mtcr r6 + ld r7, VCPU_GPR(R7)(r4) ld r6, VCPU_GPR(R6)(r4) ld r0, VCPU_GPR(R0)(r4) ld r4, VCPU_GPR(R4)(r4) @@ -1133,7 +1134,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) * The hcall we just completed was from Ultravisor. Use UV_RETURN * ultra call to return to the Ultravisor. Results from the hcall * are already in the appropriate registers (r3:12), except for - * R6 which we used as a temporary register above. Restore that, + * R6,7 which we used as temporary registers above. Restore them, * and set R0 to the ucall number (UV_RETURN). */ ret_to_ultra: @@ -1141,6 +1142,7 @@ ret_to_ultra: mtcr r6 mfspr r11, SPRN_SRR1 LOAD_REG_IMMEDIATE(r0, UV_RETURN) + ld r7, VCPU_GPR(R7)(r4) ld r6, VCPU_GPR(R6)(r4) ld r4, VCPU_GPR(R4)(r4) sc 2