@@ -113,6 +113,8 @@ config ARCH_LS1088A
select SYS_FSL_SRDS_1
select SYS_FSL_SRDS_2
select FSL_TZASC_1
+ select FSL_TZASC_400
+ select FSL_TZPC_BP147
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
@@ -145,6 +147,8 @@ config ARCH_LS2080A
select SYS_FSL_SRDS_2
select FSL_TZASC_1
select FSL_TZASC_2
+ select FSL_TZASC_400
+ select FSL_TZPC_BP147
select SYS_FSL_ERRATUM_A008336 if !TFABOOT
select SYS_FSL_ERRATUM_A008511 if !TFABOOT
select SYS_FSL_ERRATUM_A008514 if !TFABOOT
@@ -404,6 +408,11 @@ config FSL_TZASC_1
config FSL_TZASC_2
bool
+config FSL_TZASC_400
+ bool
+
+config FSL_TZPC_BP147
+ bool
endmenu
menu "Layerscape clock tree configuration"
@@ -26,7 +26,6 @@
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6
#define L1_CACHE_BYTES BIT(L1_CACHE_SHIFT)
-#define CONFIG_FSL_TZASC_400
#endif
#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */
@@ -121,8 +120,6 @@
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
#define CONFIG_GICV3
-#define CONFIG_FSL_TZPC_BP147
-#define CONFIG_FSL_TZASC_400
#define CONFIG_SYS_PAGE_SIZE 0x10000
#define SRDS_MAX_LANES 4
@@ -10,7 +10,6 @@
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_GICV3
-#define CONFIG_FSL_TZPC_BP147
#include <asm/arch/stream_id_lsch3.h>
#include <asm/arch/config.h>
@@ -675,8 +675,6 @@ CONFIG_FSL_SGMII_RISER
CONFIG_FSL_SPI_INTERFACE
CONFIG_FSL_TBCLK_EXTRA_DIV
CONFIG_FSL_TRUST_ARCH_v1
-CONFIG_FSL_TZASC_400
-CONFIG_FSL_TZPC_BP147
CONFIG_FSL_USDHC
CONFIG_FSL_VIA
CONFIG_FSMC_NAND_BASE
Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig for LS1088A and LS2088A platforms. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 9 +++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 --- include/configs/ls2080a_common.h | 1 - scripts/config_whitelist.txt | 2 -- 4 files changed, 9 insertions(+), 6 deletions(-)