| Message ID | 20190117224550.18043-1-paul@crapouillou.net |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | [1/4] dt-bindings: memory: jz4780: Add compatible string for JZ4725B SoC | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Thu, 17 Jan 2019 19:45:47 -0300 Paul Cercueil <paul@crapouillou.net> wrote: > Add a compatible string to support the memory controller built into the > JZ4725B SoC from Ingenic. > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> > --- > .../devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt > index f936b5589b19..7cce6d761f2d 100644 > --- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt > +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt > @@ -5,6 +5,7 @@ controller in Ingenic JZ4780 > > Required properties: > - compatible: Should be set to one of: > + "ingenic,jz4725b-nemc" (JZ4725B) > "ingenic,jz4780-nemc" (JZ4780) > - reg: Should specify the NEMC controller registers location and length. > - clocks: Clock for the NEMC controller.
On Thu, 17 Jan 2019 19:45:48 -0300 Paul Cercueil <paul@crapouillou.net> wrote: > Depending on MACH_JZ4780 prevent us from creating a generic kernel that > works on more than one MIPS board. Instead, we just depend on MIPS being > set. > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> > --- > drivers/memory/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig > index 2d91b00e3591..3d411575fcb6 100644 > --- a/drivers/memory/Kconfig > +++ b/drivers/memory/Kconfig > @@ -122,7 +122,7 @@ config FSL_IFC > config JZ4780_NEMC > bool "Ingenic JZ4780 SoC NEMC driver" > default y > - depends on MACH_JZ4780 || COMPILE_TEST > + depends on MIPS || COMPILE_TEST > depends on HAS_IOMEM && OF > help > This driver is for the NAND/External Memory Controller (NEMC) in
On Thu, 17 Jan 2019 19:45:49 -0300 Paul Cercueil <paul@crapouillou.net> wrote: > The maximum value found in that array is 15, there's no need to store > these values as uint32_t, a uint8_t is enough. Is it really worth the additional cast you add in the code? > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> > --- > drivers/memory/jz4780-nemc.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/memory/jz4780-nemc.c b/drivers/memory/jz4780-nemc.c > index bcf06adefc96..ef3f20e46590 100644 > --- a/drivers/memory/jz4780-nemc.c > +++ b/drivers/memory/jz4780-nemc.c > @@ -161,7 +161,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, > * Conversion of tBP and tAW cycle counts to values supported by the > * hardware (round up to the next supported value). > */ > - static const uint32_t convert_tBP_tAW[] = { > + static const u8 convert_tBP_tAW[] = { > 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, > > /* 11 - 12 -> 12 cycles */ > @@ -232,7 +232,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, > return false; > } > > - smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TBP_SHIFT; > + smcr |= (u32)convert_tBP_tAW[cycles] << NEMC_SMCR_TBP_SHIFT; > } > > if (of_property_read_u32(node, "ingenic,nemc-tAW", &val) == 0) { > @@ -244,7 +244,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, > return false; > } > > - smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TAW_SHIFT; > + smcr |= (u32)convert_tBP_tAW[cycles] << NEMC_SMCR_TAW_SHIFT; > } > > if (of_property_read_u32(node, "ingenic,nemc-tSTRV", &val) == 0) {
On Thu, 17 Jan 2019 19:45:50 -0300 Paul Cercueil <paul@crapouillou.net> wrote: > Add support for the JZ4725B SoC from Ingenic. > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> I don't know anything about the JZ4725B constraints but the code looks good, so Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> > --- > drivers/memory/jz4780-nemc.c | 24 +++++++++++++++++++++--- > 1 file changed, 21 insertions(+), 3 deletions(-) > > diff --git a/drivers/memory/jz4780-nemc.c b/drivers/memory/jz4780-nemc.c > index ef3f20e46590..c472a22d6df5 100644 > --- a/drivers/memory/jz4780-nemc.c > +++ b/drivers/memory/jz4780-nemc.c > @@ -44,9 +44,14 @@ > #define NEMC_NFCSR_NFCEn(n) BIT((((n) - 1) << 1) + 1) > #define NEMC_NFCSR_TNFEn(n) BIT(16 + (n) - 1) > > +struct jz_soc_info { > + u8 tas_tah_cycles_max; > +}; > + > struct jz4780_nemc { > spinlock_t lock; > struct device *dev; > + const struct jz_soc_info *soc_info; > void __iomem *base; > struct clk *clk; > uint32_t clk_period; > @@ -202,7 +207,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, > if (of_property_read_u32(node, "ingenic,nemc-tAS", &val) == 0) { > smcr &= ~NEMC_SMCR_TAS_MASK; > cycles = jz4780_nemc_ns_to_cycles(nemc, val); > - if (cycles > 15) { > + if (cycles > nemc->soc_info->tas_tah_cycles_max) { > dev_err(nemc->dev, "tAS %u is too high (%u cycles)\n", > val, cycles); > return false; > @@ -214,7 +219,7 @@ static bool jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, > if (of_property_read_u32(node, "ingenic,nemc-tAH", &val) == 0) { > smcr &= ~NEMC_SMCR_TAH_MASK; > cycles = jz4780_nemc_ns_to_cycles(nemc, val); > - if (cycles > 15) { > + if (cycles > nemc->soc_info->tas_tah_cycles_max) { > dev_err(nemc->dev, "tAH %u is too high (%u cycles)\n", > val, cycles); > return false; > @@ -278,6 +283,10 @@ static int jz4780_nemc_probe(struct platform_device *pdev) > if (!nemc) > return -ENOMEM; > > + nemc->soc_info = device_get_match_data(dev); > + if (!nemc->soc_info) > + return -EINVAL; > + > spin_lock_init(&nemc->lock); > nemc->dev = dev; > > @@ -370,8 +379,17 @@ static int jz4780_nemc_remove(struct platform_device *pdev) > return 0; > } > > +static const struct jz_soc_info jz4725b_soc_info = { > + .tas_tah_cycles_max = 7, > +}; > + > +static const struct jz_soc_info jz4780_soc_info = { > + .tas_tah_cycles_max = 15, > +}; > + > static const struct of_device_id jz4780_nemc_dt_match[] = { > - { .compatible = "ingenic,jz4780-nemc" }, > + { .compatible = "ingenic,jz4725b-nemc", .data = &jz4725b_soc_info, }, > + { .compatible = "ingenic,jz4780-nemc", .data = &jz4780_soc_info, }, > {}, > }; >
Hi, On Fri, Jan 18, 2019 at 5:15 AM, Boris Brezillon <bbrezillon@kernel.org> wrote: > On Thu, 17 Jan 2019 19:45:49 -0300 > Paul Cercueil <paul@crapouillou.net <mailto:paul@crapouillou.net>> > wrote: > >> The maximum value found in that array is 15, there's no need to >> store >> these values as uint32_t, a uint8_t is enough. > > Is it really worth the additional cast you add in the code? They're not needed. I had to verify, because it was not obvious to me. I'll remove them then. >> >> Signed-off-by: Paul Cercueil <paul@crapouillou.net >> <mailto:paul@crapouillou.net>> >> --- >> drivers/memory/jz4780-nemc.c | 6 +++--- >> 1 file changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/memory/jz4780-nemc.c >> b/drivers/memory/jz4780-nemc.c >> index bcf06adefc96..ef3f20e46590 100644 >> --- a/drivers/memory/jz4780-nemc.c >> +++ b/drivers/memory/jz4780-nemc.c >> @@ -161,7 +161,7 @@ static bool jz4780_nemc_configure_bank(struct >> jz4780_nemc *nemc, >> * Conversion of tBP and tAW cycle counts to values supported by >> the >> * hardware (round up to the next supported value). >> */ >> - static const uint32_t convert_tBP_tAW[] = { >> + static const u8 convert_tBP_tAW[] = { >> 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, >> >> /* 11 - 12 -> 12 cycles */ >> @@ -232,7 +232,7 @@ static bool jz4780_nemc_configure_bank(struct >> jz4780_nemc *nemc, >> return false; >> } >> >> - smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TBP_SHIFT; >> + smcr |= (u32)convert_tBP_tAW[cycles] << NEMC_SMCR_TBP_SHIFT; >> } >> >> if (of_property_read_u32(node, "ingenic,nemc-tAW", &val) == 0) { >> @@ -244,7 +244,7 @@ static bool jz4780_nemc_configure_bank(struct >> jz4780_nemc *nemc, >> return false; >> } >> >> - smcr |= convert_tBP_tAW[cycles] << NEMC_SMCR_TAW_SHIFT; >> + smcr |= (u32)convert_tBP_tAW[cycles] << NEMC_SMCR_TAW_SHIFT; >> } >> >> if (of_property_read_u32(node, "ingenic,nemc-tSTRV", &val) == 0) { >
diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt index f936b5589b19..7cce6d761f2d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt @@ -5,6 +5,7 @@ controller in Ingenic JZ4780 Required properties: - compatible: Should be set to one of: + "ingenic,jz4725b-nemc" (JZ4725B) "ingenic,jz4780-nemc" (JZ4780) - reg: Should specify the NEMC controller registers location and length. - clocks: Clock for the NEMC controller.
Add a compatible string to support the memory controller built into the JZ4725B SoC from Ingenic. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- .../devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt | 1 + 1 file changed, 1 insertion(+)