Message ID | e5f76fb0e4c5973674f561d9599a3b41ec97c400.1547708960.git.michal.simek@xilinx.com |
---|---|
State | Accepted |
Commit | d9eaae3bae99cf79fd1453f4980b2624a6be9501 |
Delegated to: | Michal Simek |
Headers | show |
Series | [U-Boot,v2] travis: Wire Xilinx Versal Virt platform | expand |
diff --git a/.travis.yml b/.travis.yml index 8991e12d6a1a..8daebdc8c157 100644 --- a/.travis.yml +++ b/.travis.yml @@ -448,6 +448,13 @@ matrix: QEMU_TARGET="arm-softmmu" TEST_PY_ID="--id qemu" BUILDMAN="^zynq_zc702$" + - name: "test/py xilinx_versal_virt" + env: + - TEST_PY_BD="xilinx_versal_virt" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="aarch64-softmmu" + TEST_PY_ID="--id qemu" + BUILDMAN="^xilinx_versal_virt$" - name: "test/py xtfpga" env: - TEST_PY_BD="xtfpga"
Test Xilinx Versal Virt platform running on the v3.1.0 Qemu. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- Changes in v2: - Rebased on the top of https://lists.denx.de/pipermail/u-boot/2019-January/354857.html .travis.yml | 7 +++++++ 1 file changed, 7 insertions(+)