new file mode 100644
@@ -0,0 +1,36 @@
+/*
+ * TPM Physical Presence Interface
+ *
+ * Copyright (C) 2018 IBM Corporation
+ *
+ * Authors:
+ * Stefan Berger <stefanb@us.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+#ifndef TPM_TPM_PPI_H
+#define TPM_TPM_PPI_H
+
+#include "hw/acpi/tpm.h"
+#include "exec/address-spaces.h"
+
+typedef struct TPMPPI {
+ MemoryRegion ram;
+ uint8_t *buf;
+} TPMPPI;
+
+/**
+ * tpm_ppi_init:
+ * @tpmppi: a TPMPPI
+ * @m: the address-space / MemoryRegion to use
+ * @addr: the address of the PPI region
+ * @obj: the owner object
+ *
+ * Register the TPM PPI memory region at @addr on the given address
+ * space for the object @obj.
+ **/
+void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m,
+ hwaddr addr, Object *obj);
+
+#endif /* TPM_TPM_PPI_H */
@@ -188,4 +188,10 @@ REG32(CRB_DATA_BUFFER, 0x80)
#define TPM2_START_METHOD_MMIO 6
#define TPM2_START_METHOD_CRB 7
+/*
+ * Physical Presence Interface
+ */
+#define TPM_PPI_ADDR_SIZE 0x400
+#define TPM_PPI_ADDR_BASE 0xFED45000
+
#endif /* HW_ACPI_TPM_H */
@@ -29,6 +29,7 @@
#include "sysemu/reset.h"
#include "tpm_int.h"
#include "tpm_util.h"
+#include "tpm_ppi.h"
#include "trace.h"
typedef struct CRBState {
@@ -43,6 +44,7 @@ typedef struct CRBState {
size_t be_buffer_size;
bool ppi_enabled;
+ TPMPPI ppi;
} CRBState;
#define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB)
@@ -294,6 +296,11 @@ static void tpm_crb_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(get_system_memory(),
TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem);
+ if (s->ppi_enabled) {
+ tpm_ppi_init(&s->ppi, get_system_memory(),
+ TPM_PPI_ADDR_BASE, OBJECT(s));
+ }
+
qemu_register_reset(tpm_crb_reset, dev);
}
new file mode 100644
@@ -0,0 +1,31 @@
+/*
+ * tpm_ppi.c - TPM Physical Presence Interface
+ *
+ * Copyright (C) 2018 IBM Corporation
+ *
+ * Authors:
+ * Stefan Berger <stefanb@us.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+
+#include "qapi/error.h"
+#include "cpu.h"
+#include "sysemu/memory_mapping.h"
+#include "migration/vmstate.h"
+#include "tpm_ppi.h"
+
+void tpm_ppi_init(TPMPPI *tpmppi, struct MemoryRegion *m,
+ hwaddr addr, Object *obj)
+{
+ tpmppi->buf = g_malloc0(HOST_PAGE_ALIGN(TPM_PPI_ADDR_SIZE));
+ memory_region_init_ram_device_ptr(&tpmppi->ram, obj, "tpm-ppi",
+ TPM_PPI_ADDR_SIZE, tpmppi->buf);
+ vmstate_register_ram(&tpmppi->ram, DEVICE(obj));
+
+ memory_region_add_subregion(m, addr, &tpmppi->ram);
+}
@@ -31,6 +31,7 @@
#include "sysemu/tpm_backend.h"
#include "tpm_int.h"
#include "tpm_util.h"
+#include "tpm_ppi.h"
#include "trace.h"
#define TPM_TIS_NUM_LOCALITIES 5 /* per spec */
@@ -83,6 +84,7 @@ typedef struct TPMState {
size_t be_buffer_size;
bool ppi_enabled;
+ TPMPPI ppi;
} TPMState;
#define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS)
@@ -983,6 +985,11 @@ static void tpm_tis_realizefn(DeviceState *dev, Error **errp)
memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)),
TPM_TIS_ADDR_BASE, &s->mmio);
+
+ if (s->ppi_enabled) {
+ tpm_ppi_init(&s->ppi, isa_address_space(ISA_DEVICE(dev)),
+ TPM_PPI_ADDR_BASE, OBJECT(s));
+ }
}
static void tpm_tis_initfn(Object *obj)
@@ -1,4 +1,5 @@
common-obj-y += tpm_util.o
+obj-y += tpm_ppi.o
common-obj-$(CONFIG_TPM_TIS) += tpm_tis.o
common-obj-$(CONFIG_TPM_CRB) += tpm_crb.o
common-obj-$(CONFIG_TPM_PASSTHROUGH) += tpm_passthrough.o