From patchwork Thu Jan 10 18:40:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1023170 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="PjEe+M74"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43bFfZ5x9sz9sCh for ; Fri, 11 Jan 2019 05:59:34 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 6EBEBC22142; Thu, 10 Jan 2019 18:52:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0F50EC2217C; Thu, 10 Jan 2019 18:46:14 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 56BF2C2217C; Thu, 10 Jan 2019 18:46:12 +0000 (UTC) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by lists.denx.de (Postfix) with ESMTPS id C3891C2212E for ; Thu, 10 Jan 2019 18:44:57 +0000 (UTC) Received: by mail-pg1-f195.google.com with SMTP id z11so5198155pgu.0 for ; Thu, 10 Jan 2019 10:44:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e+USYQ9D+55NkCJl4ySsrR7bu4kMXKBg2yRO1L3VdFg=; b=PjEe+M74jb5ClY/eVMRZH24Jxr+8OPfzxkk4qPNjx+hHcYetRZhRH2UaE3lhdJiY7x 3Yqff9QWm979qHIbWfW6B8xRs99TAzywFs0mZPX7c9zNKuLKbxucHuvkCfNXVuWhz77D RW5cDMqxtXe3tjbjNvRrM1HD8PazEmeL6xRac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e+USYQ9D+55NkCJl4ySsrR7bu4kMXKBg2yRO1L3VdFg=; b=h6e0ZfHUDxpGCh2iBL1Z50jLoQ0DmVGsbyoO3xalAKv3drvWqEOFVbBKa5+lrIsqr5 uUGk7l24NeEjnsFvsd3G3IyugyvK8FYXUgtMS//mU/CA8U6cuz3n2PZzovsE4PwN44U1 8LRE6BsanLv33kiE4syNBkx/n3KkD2f5bJ5iOYZs8z3jD3iEaqZxzSgr5YwSQjsAY30K TNgwKzbFuZYaGEAIWpZW5iDojgtb2opidsLldyz5XyX9aLntsNtKo70k8qjXagZ+KApX KKA+yYtZfb2GJ56GcszoBRr6EkVbYCxM8mc3Ku0IiXk0ZXKhImykRKpxLiuWT30OHqRG tW6Q== X-Gm-Message-State: AJcUukeu1qz09l3guSqGySVL0sX8pIVjeVQC/T5E0Hl1TbaJZTu9jhou dAPNzAWzvIahrGnfKGtf0eUNVw== X-Google-Smtp-Source: ALg8bN7/WseYF/Rrl+2Ne6PQb1oYhFU1hbHmhs/Zsk5G+NRebV0AFMIFpMqLJVHcrGqSZH2JVwh0Aw== X-Received: by 2002:a63:24c2:: with SMTP id k185mr10044214pgk.406.1547145896341; Thu, 10 Jan 2019 10:44:56 -0800 (PST) Received: from localhost.localdomain ([49.206.202.55]) by smtp.gmail.com with ESMTPSA id t90sm156370546pfj.23.2019.01.10.10.44.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Jan 2019 10:44:55 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Andre Przywara , Chen-Yu Tsai , Simon Glass , Tom Rini , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Michael Trimarchi , linux-amarula@amarulasolutions.com Date: Fri, 11 Jan 2019 00:10:14 +0530 Message-Id: <20190110184016.17027-19-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190110184016.17027-1-jagan@amarulasolutions.com> References: <20190110184016.17027-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Subject: [U-Boot] [PATCH v6 18/20] musb-new: sunxi: Use CLK and RESET support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now clock and reset drivers are available for respective SoC's so use clk and reset ops on musb driver. Signed-off-by: Jagan Teki Acked-by: Maxime Ripard Reviewed-by: Marek Vasut --- drivers/usb/musb-new/sunxi.c | 79 ++++++++++++++++++------------------ 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index f3deb9bc66..906c08ece9 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -16,9 +16,11 @@ * This file is part of the Inventra Controller Driver for Linux. */ #include +#include #include #include #include +#include #include #include #include @@ -80,16 +82,12 @@ struct sunxi_musb_config { struct musb_hdrc_config *config; - bool has_reset; - u8 rst_bit; - u8 clkgate_bit; - u32 off_reset0; }; struct sunxi_glue { struct musb_host_data mdata; - struct sunxi_ccm_reg *ccm; - u32 *reg_reset0; + struct clk clk; + struct reset_ctl rst; struct sunxi_musb_config *cfg; struct device dev; struct phy phy; @@ -296,24 +294,27 @@ static int sunxi_musb_init(struct musb *musb) pr_debug("%s():\n", __func__); - ret = generic_phy_init(&glue->phy); + ret = clk_enable(&glue->clk); if (ret) { - pr_err("failed to init USB PHY\n"); + dev_err(dev, "failed to enable clock\n"); return ret; } - musb->isr = sunxi_musb_interrupt; - - setbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0)); - if (glue->cfg->clkgate_bit) - setbits_le32(&glue->ccm->ahb_gate0, - BIT(glue->cfg->clkgate_bit)); + if (reset_valid(&glue->rst)) { + ret = reset_deassert(&glue->rst); + if (ret) { + dev_err(dev, "failed to deassert reset\n"); + goto err_clk; + } + } - if (glue->cfg->has_reset) - setbits_le32(glue->reg_reset0, BIT(AHB_GATE_OFFSET_USB0)); + ret = generic_phy_init(&glue->phy); + if (ret) { + dev_err(dev, "failed to init USB PHY\n"); + goto err_rst; + } - if (glue->cfg->rst_bit) - setbits_le32(glue->reg_reset0, BIT(glue->cfg->rst_bit)); + musb->isr = sunxi_musb_interrupt; USBC_ConfigFIFO_Base(); USBC_EnableDpDmPullUp(musb->mregs); @@ -329,6 +330,13 @@ static int sunxi_musb_init(struct musb *musb) USBC_ForceVbusValidToHigh(musb->mregs); return 0; + +err_rst: + if (reset_valid(&glue->rst)) + reset_assert(&glue->rst); +err_clk: + clk_disable(&glue->clk); + return ret; } static int sunxi_musb_exit(struct musb *musb) @@ -344,16 +352,9 @@ static int sunxi_musb_exit(struct musb *musb) } } - if (glue->cfg->has_reset) - clrbits_le32(glue->reg_reset0, BIT(AHB_GATE_OFFSET_USB0)); - - if (glue->cfg->rst_bit) - clrbits_le32(glue->reg_reset0, BIT(glue->cfg->rst_bit)); - - clrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0)); - if (glue->cfg->clkgate_bit) - clrbits_le32(&glue->ccm->ahb_gate0, - BIT(glue->cfg->clkgate_bit)); + if (reset_valid(&glue->rst)) + reset_assert(&glue->rst); + clk_disable(&glue->clk); return 0; } @@ -450,11 +451,17 @@ static int musb_usb_probe(struct udevice *dev) if (!glue->cfg) return -EINVAL; - glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - if (IS_ERR(glue->ccm)) - return PTR_ERR(glue->ccm); + ret = clk_get_by_index(dev, 0, &glue->clk); + if (ret) { + dev_err(dev, "failed to get clock\n"); + return ret; + } - glue->reg_reset0 = (void *)glue->ccm + glue->cfg->off_reset0; + ret = reset_get_by_index(dev, 0, &glue->rst); + if (ret && ret != -ENOENT) { + dev_err(dev, "failed to get reset\n"); + return ret; + } ret = generic_phy_get_by_name(dev, "usb", &glue->phy); if (ret) { @@ -462,7 +469,6 @@ static int musb_usb_probe(struct udevice *dev) return ret; } - memset(&pdata, 0, sizeof(pdata)); pdata.power = 250; pdata.platform_ops = &sunxi_musb_ops; @@ -505,21 +511,14 @@ static int musb_usb_remove(struct udevice *dev) static const struct sunxi_musb_config sun4i_a10_cfg = { .config = &musb_config, - .has_reset = false, }; static const struct sunxi_musb_config sun6i_a31_cfg = { .config = &musb_config, - .has_reset = true, - .off_reset0 = OFF_SUN6I_AHB_RESET0, }; static const struct sunxi_musb_config sun8i_h3_cfg = { .config = &musb_config_h3, - .has_reset = true, - .rst_bit = 23, - .clkgate_bit = 23, - .off_reset0 = OFF_SUN6I_AHB_RESET0, }; static const struct udevice_id sunxi_musb_ids[] = {