[U-Boot,10/18] rockchip: Clarify docs on SPI writing

Message ID 20190110042457.134141-11-sjg@chromium.org
State New
Delegated to: Philipp Tomsich
Headers show
  • rockchip: Add support for Bob Chromebook
Related show

Commit Message

Simon Glass Jan. 10, 2019, 4:24 a.m.
We use every second block when creating a SPI image, so update the text to
say this explicitly.

Signed-off-by: Simon Glass <sjg@chromium.org>

 doc/README.rockchip | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


diff --git a/doc/README.rockchip b/doc/README.rockchip
index a45b8a97b7..9b7e4bac11 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -261,7 +261,7 @@  To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
    dd if=out.bin of=out.bin.pad bs=4M conv=sync
 This converts the SPL image to the required SPI format by adding the Rockchip
-header and skipping every 2KB block. Then the U-Boot image is written at
+header and skipping every second 2KB block. Then the U-Boot image is written at
 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
 The position of U-Boot is controlled with this setting in U-Boot: