From patchwork Thu Jan 10 04:24:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1022728 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="XFaj8iLD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43ZtJR33Z8z9sN4 for ; Thu, 10 Jan 2019 15:27:35 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 219EEC21FEE; Thu, 10 Jan 2019 04:26:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6EE42C2202F; Thu, 10 Jan 2019 04:25:42 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A5821C21FBA; Thu, 10 Jan 2019 04:25:30 +0000 (UTC) Received: from mail-io1-f69.google.com (mail-io1-f69.google.com [209.85.166.69]) by lists.denx.de (Postfix) with ESMTPS id 134D2C21F9D for ; Thu, 10 Jan 2019 04:25:30 +0000 (UTC) Received: by mail-io1-f69.google.com with SMTP id v8so8587221ioh.11 for ; Wed, 09 Jan 2019 20:25:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=OfLelNhMueSX2Jq42FV7K0UBuDIOu5jXD5QIqtlDlfo=; b=XFaj8iLDkq0pLGYfNyT46rVN19Ao7x9THxX7TPBErN/S6tP7nTh1fi3irGihHj7R+F NPhKe7m7Y28qc2DvnxCkH9qZpORTb69qkBmEJ+srDhSDhjy5tpKTHS57f2o8zARDN4ly ke/CLuKogrEV7KU8n6Zj0Qg7lLE2Iq1zZVCSo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=OfLelNhMueSX2Jq42FV7K0UBuDIOu5jXD5QIqtlDlfo=; b=V3oC84OLvWKturMw0BNNFV959JQm4A94u+b/x5tUv90k/N4h3t5Tqjr827gIP3kKMl LG5ry3TsoRG94ItsHRga3OH58FMY5Bnlp7rk05CgNaS/4ByeE4N/87Fteb0YmMrOXIUl b+6h9ywm/OvpCshS2FJVH1K0AMPpJkBQlSCvFoHWVUJy26segpQvyWxv8c0eR1+6ZegC WWgL+o8nt8QWvcwG+6twgHodVTVqfylJ8rpEialfXhbgGlUgP/X3cFez3RMi0yRiOWL5 H6MPtqM51LLCq4zU5bZTAls0Rn/o2W2sUcdEr7zNlxwPp+oKqV8TevZ9xRxyRQAnEYSa gydw== X-Gm-Message-State: AJcUukcN+Yw4q0u7UMRNQJDTUtkoLvVpAEYtQ0Ue0FnF0lGT6Zu6zZu3 MQoTvYaE+lLxTo5ccTgxRbLhgikkMZcioTkj X-Google-Smtp-Source: ALg8bN4s0CQDQr5qpdnZtxMCE3Q5FDKOfdRpEpbmVU5TU7mBJqwVpIDHziL0JErLwO/RidtmjBLbCTKoP9P0Ss88 X-Received: by 2002:a24:655:: with SMTP id 82mr2780714itv.24.1547094328871; Wed, 09 Jan 2019 20:25:28 -0800 (PST) Date: Wed, 9 Jan 2019 21:24:43 -0700 In-Reply-To: <20190110042457.134141-1-sjg@chromium.org> Message-Id: <20190110042457.134141-5-sjg@chromium.org> Mime-Version: 1.0 References: <20190110042457.134141-1-sjg@chromium.org> X-Mailer: git-send-email 2.20.1.97.g81188d93c3-goog From: Simon Glass To: U-Boot Mailing List Cc: Jeffy Chen , huang lin Subject: [U-Boot] [PATCH 04/18] gpio: Add a simple GPIO API for SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" In space-constrained environments or before driver model is available, it is sometimes necessary to set GPIO values. Add an SPL API for this, to allow early board code to change GPIOs. The caller must provide the register address, so that the drivers can be fairly generic. This API can be implemented by GPIO drivers, behind a suitable guard, like #ifdef CONFIG_SPL_BUILD. Signed-off-by: Simon Glass --- include/spl_gpio.h | 62 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 include/spl_gpio.h diff --git a/include/spl_gpio.h b/include/spl_gpio.h new file mode 100644 index 0000000000..e410e62914 --- /dev/null +++ b/include/spl_gpio.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Simple GPIO access from SPL. This only supports a single GPIO space, + * typically the SoC GPIO banks. + * + * Copyright 2018 Google LLC + */ + +#ifndef __SPL_GPIO_H +#define __SPL_GPIO_H + +#include + +/* + * The functions listed here should be implemented in the SoC GPIO driver. + * They correspond to the normal GPIO API (asm-generic/gpio.h). The GPIO + * number is encoded in an unsigned int by an SoC-specific means. Pull + * values are also SoC-specific. + * + * This API should only be used in TPL/SPL where GPIO access is needed but + * driver model is not available (yet) or adds too much overhead. + * + * The caller must supply the GPIO register base since this information is + * often specific to a particular SoC generation. This allows the GPIO + * code to be fairly generic. + * + * Only a single implementation of each of these functions can be provided. + * + * The 'gpio' value can include both a bank and a GPIO number, if desired. The + * encoding is SoC-specific. + */ + +/** + * spl_gpio_set_pull() - Set the pull up/down state of a GPIO + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @pull: Pull value (SoC-specific) + * @return return 0 if OK, -ve on error + */ +int spl_gpio_set_pull(void *regs, uint gpio, int pull); + +/** + * spl_gpio_output() - Set a GPIO as an output + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @value: 0 to set the output low, 1 to set it high + * @return return 0 if OK, -ve on error + */ +int spl_gpio_output(void *regs, uint gpio, int value); + +/** + * spl_gpio_input() - Set a GPIO as an input + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @return return 0 if OK, -ve on error + */ +int spl_gpio_input(void *regs, uint gpio); + +#endif /* __SPL_GPIO_H */