[v2,1/2] dt-binding: iio: add NPCM ADC documentation

Message ID 20190109164343.164205-2-tmaimon77@gmail.com
State Not Applicable, archived
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Series
  • iio: adc: npcm: add NPCM ADC driver
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Commit Message

Tomer Maimon Jan. 9, 2019, 4:43 p.m.
Added device tree binding documentation for Nuvoton BMC
NPCM Analog-to-Digital Converter(ADC).

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 .../bindings/iio/adc/nuvoton,npcm-adc.txt          | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt

Comments

Jonathan Cameron Jan. 12, 2019, 6:46 p.m. | #1
On Wed,  9 Jan 2019 18:43:42 +0200
Tomer Maimon <tmaimon77@gmail.com> wrote:

> Added device tree binding documentation for Nuvoton BMC
> NPCM Analog-to-Digital Converter(ADC).
> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
This looks fine to me, but I would like Rob's confirmation that
he is happy with the reset part in particular.

Thanks,

Jonathan

> ---
>  .../bindings/iio/adc/nuvoton,npcm-adc.txt          | 35 ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> new file mode 100644
> index 000000000000..1b8132cd9060
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> @@ -0,0 +1,35 @@
> +Nuvoton NPCM Analog to Digital Converter (ADC)
> +
> +The NPCM ADC is a 10-bit converter for eight channel inputs.
> +
> +Required properties:
> +- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
> +- reg: specifies physical base address and size of the registers.
> +- interrupts: Contain the ADC interrupt with flags for falling edge.
> +
> +Optional properties:
> +- clocks: phandle of ADC reference clock, in case the clock is not
> +		  added the ADC will use the default ADC sample rate.
> +- vref-supply: The regulator supply ADC reference voltage, in case the
> +			   vref-supply is not added the ADC will use internal voltage
> +			   reference.
> +
> +Required Node in the NPCM7xx BMC:
> +An additional register is present in the NPCM7xx SOC which is
> +assumed to be in the same device tree, with and marked as
> +compatible with "nuvoton,npcm750-rst".
> +
> +Example:
> +
> +adc: adc@f000c000 {
> +	compatible = "nuvoton,npcm750-adc";
> +	reg = <0xf000c000 0x8>;
> +	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> +	clocks = <&clk NPCM7XX_CLK_ADC>;
> +};
> +
> +rst: rst@f0801000 {
> +	compatible = "nuvoton,npcm750-rst", "syscon",
> +	"simple-mfd";
> +	reg = <0xf0801000 0x6C>;
> +};
Rob Herring Jan. 15, 2019, 9:31 p.m. | #2
On Wed,  9 Jan 2019 18:43:42 +0200, Tomer Maimon wrote:
> Added device tree binding documentation for Nuvoton BMC
> NPCM Analog-to-Digital Converter(ADC).
> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>  .../bindings/iio/adc/nuvoton,npcm-adc.txt          | 35 ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
> 

Reviewed-by: Rob Herring <robh@kernel.org>
Joel Stanley Jan. 15, 2019, 11:21 p.m. | #3
On Thu, 10 Jan 2019 at 03:44, Tomer Maimon <tmaimon77@gmail.com> wrote:

> +Required Node in the NPCM7xx BMC:
> +An additional register is present in the NPCM7xx SOC which is
> +assumed to be in the same device tree, with and marked as
> +compatible with "nuvoton,npcm750-rst".

Is there a reason you don't include a phandle to the reset node?

I think doing that would make more sense.

> +adc: adc@f000c000 {
> +       compatible = "nuvoton,npcm750-adc";
> +       reg = <0xf000c000 0x8>;
> +       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> +       clocks = <&clk NPCM7XX_CLK_ADC>;
> +};

> +
> +rst: rst@f0801000 {
> +       compatible = "nuvoton,npcm750-rst", "syscon",
> +       "simple-mfd";
> +       reg = <0xf0801000 0x6C>;
> +};
Tomer Maimon Jan. 18, 2019, 3:18 p.m. | #4
Hi Joel,

Thanks for bringing this to my attention,

I think I will leave it the same way it is now because I will like to
develop the reset driver and to handle the NPCM7xx SOC resets.

Cheers,

Tomer



On Wed, 16 Jan 2019 at 01:21, Joel Stanley <joel@jms.id.au> wrote:

> On Thu, 10 Jan 2019 at 03:44, Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> > +Required Node in the NPCM7xx BMC:
> > +An additional register is present in the NPCM7xx SOC which is
> > +assumed to be in the same device tree, with and marked as
> > +compatible with "nuvoton,npcm750-rst".
>
> Is there a reason you don't include a phandle to the reset node?
>
> I think doing that would make more sense.
>
> > +adc: adc@f000c000 {
> > +       compatible = "nuvoton,npcm750-adc";
> > +       reg = <0xf000c000 0x8>;
> > +       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > +       clocks = <&clk NPCM7XX_CLK_ADC>;
> > +};
>
> > +
> > +rst: rst@f0801000 {
> > +       compatible = "nuvoton,npcm750-rst", "syscon",
> > +       "simple-mfd";
> > +       reg = <0xf0801000 0x6C>;
> > +};
>
<div dir="ltr">Hi Joel,<div><br></div><div>Thanks for bringing this to my attention,</div><div><br></div><div>I think I will leave it the same way it is now because I will like to develop the reset driver and to handle the NPCM7xx SOC resets.</div><div><br></div><div>Cheers,</div><div><br></div><div>Tomer</div><div><br></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr">On Wed, 16 Jan 2019 at 01:21, Joel Stanley &lt;<a href="mailto:joel@jms.id.au">joel@jms.id.au</a>&gt; wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Thu, 10 Jan 2019 at 03:44, Tomer Maimon &lt;<a href="mailto:tmaimon77@gmail.com" target="_blank">tmaimon77@gmail.com</a>&gt; wrote:<br>
<br>
&gt; +Required Node in the NPCM7xx BMC:<br>
&gt; +An additional register is present in the NPCM7xx SOC which is<br>
&gt; +assumed to be in the same device tree, with and marked as<br>
&gt; +compatible with &quot;nuvoton,npcm750-rst&quot;.<br>
<br>
Is there a reason you don&#39;t include a phandle to the reset node?<br>
<br>
I think doing that would make more sense.<br>
<br>
&gt; +adc: adc@f000c000 {<br>
&gt; +       compatible = &quot;nuvoton,npcm750-adc&quot;;<br>
&gt; +       reg = &lt;0xf000c000 0x8&gt;;<br>
&gt; +       interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;<br>
&gt; +       clocks = &lt;&amp;clk NPCM7XX_CLK_ADC&gt;;<br>
&gt; +};<br>
<br>
&gt; +<br>
&gt; +rst: rst@f0801000 {<br>
&gt; +       compatible = &quot;nuvoton,npcm750-rst&quot;, &quot;syscon&quot;,<br>
&gt; +       &quot;simple-mfd&quot;;<br>
&gt; +       reg = &lt;0xf0801000 0x6C&gt;;<br>
&gt; +};<br>
</blockquote></div>
Joel Stanley Jan. 21, 2019, 1:48 a.m. | #5
On Sat, 19 Jan 2019 at 02:12, Tomer Maimon <tmaimon77@gmail.com> wrote:
>
> Hi Joel,
>
> Thanks for bringing this to my attention,
>
> I think I will leave it the same way it is now because I will like to develop the reset driver and to handle the NPCM7xx SOC resets.

You could also do that.

But I was suggesting you use a phandle, so you could then find the
node you want without searching the entire device tree for the node
with the correct compatible.
Rob Herring Jan. 21, 2019, 4:12 p.m. | #6
On Sun, Jan 20, 2019 at 7:48 PM Joel Stanley <joel@jms.id.au> wrote:
>
> On Sat, 19 Jan 2019 at 02:12, Tomer Maimon <tmaimon77@gmail.com> wrote:
> >
> > Hi Joel,
> >
> > Thanks for bringing this to my attention,
> >
> > I think I will leave it the same way it is now because I will like to develop the reset driver and to handle the NPCM7xx SOC resets.
>
> You could also do that.
>
> But I was suggesting you use a phandle, so you could then find the
> node you want without searching the entire device tree for the node
> with the correct compatible.

That's not really any more efficient. You just search the entire tree
for the matching phandle number instead. Well, that was true until we
recently added the phandle cache.

In any case, it you plan to move to the reset binding (which would be
good), then it's better to have nothing in the DT and add something
rather than change the DT binding.

Rob
Tomer Maimon Jan. 21, 2019, 8:20 p.m. | #7
Hi Rob,

Thanks for the clarification,

I will remove the rst node and Required Node in the NPCM7xx BMC explanation
from the DT binding.

On Mon, 21 Jan 2019 at 18:12, Rob Herring <robh+dt@kernel.org> wrote:

> On Sun, Jan 20, 2019 at 7:48 PM Joel Stanley <joel@jms.id.au> wrote:
> >
> > On Sat, 19 Jan 2019 at 02:12, Tomer Maimon <tmaimon77@gmail.com> wrote:
> > >
> > > Hi Joel,
> > >
> > > Thanks for bringing this to my attention,
> > >
> > > I think I will leave it the same way it is now because I will like to
> develop the reset driver and to handle the NPCM7xx SOC resets.
> >
> > You could also do that.
> >
> > But I was suggesting you use a phandle, so you could then find the
> > node you want without searching the entire device tree for the node
> > with the correct compatible.
>
> That's not really any more efficient. You just search the entire tree
> for the matching phandle number instead. Well, that was true until we
> recently added the phandle cache.
>
> In any case, it you plan to move to the reset binding (which would be
> good), then it's better to have nothing in the DT and add something
> rather than change the DT binding.


>
Rob
>

Thanks,

Tomer
<div dir="ltr"><div dir="ltr"><br></div><div dir="ltr">Hi Rob,<br></div><div><br></div>Thanks for the clarification,<div><br></div><div>I will remove the rst node and Required Node in the NPCM7xx BMC explanation from the DT binding.</div><div> <br><div class="gmail_quote"><div dir="ltr">On Mon, 21 Jan 2019 at 18:12, Rob Herring &lt;<a href="mailto:robh%2Bdt@kernel.org">robh+dt@kernel.org</a>&gt; wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Sun, Jan 20, 2019 at 7:48 PM Joel Stanley &lt;<a href="mailto:joel@jms.id.au" target="_blank">joel@jms.id.au</a>&gt; wrote:<br>
&gt;<br>
&gt; On Sat, 19 Jan 2019 at 02:12, Tomer Maimon &lt;<a href="mailto:tmaimon77@gmail.com" target="_blank">tmaimon77@gmail.com</a>&gt; wrote:<br>
&gt; &gt;<br>
&gt; &gt; Hi Joel,<br>
&gt; &gt;<br>
&gt; &gt; Thanks for bringing this to my attention,<br>
&gt; &gt;<br>
&gt; &gt; I think I will leave it the same way it is now because I will like to develop the reset driver and to handle the NPCM7xx SOC resets.<br>
&gt;<br>
&gt; You could also do that.<br>
&gt;<br>
&gt; But I was suggesting you use a phandle, so you could then find the<br>
&gt; node you want without searching the entire device tree for the node<br>
&gt; with the correct compatible.<br>
<br>
That&#39;s not really any more efficient. You just search the entire tree<br>
for the matching phandle number instead. Well, that was true until we<br>
recently added the phandle cache.<br>
<br>
In any case, it you plan to move to the reset binding (which would be<br>
good), then it&#39;s better to have nothing in the DT and add something<br>
rather than change the DT binding.</blockquote><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"> <br></blockquote><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
Rob<br></blockquote><div><br></div><div>Thanks,</div><div><br></div><div>Tomer </div></div></div></div>

Patch

diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
new file mode 100644
index 000000000000..1b8132cd9060
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt
@@ -0,0 +1,35 @@ 
+Nuvoton NPCM Analog to Digital Converter (ADC)
+
+The NPCM ADC is a 10-bit converter for eight channel inputs.
+
+Required properties:
+- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
+- reg: specifies physical base address and size of the registers.
+- interrupts: Contain the ADC interrupt with flags for falling edge.
+
+Optional properties:
+- clocks: phandle of ADC reference clock, in case the clock is not
+		  added the ADC will use the default ADC sample rate.
+- vref-supply: The regulator supply ADC reference voltage, in case the
+			   vref-supply is not added the ADC will use internal voltage
+			   reference.
+
+Required Node in the NPCM7xx BMC:
+An additional register is present in the NPCM7xx SOC which is
+assumed to be in the same device tree, with and marked as
+compatible with "nuvoton,npcm750-rst".
+
+Example:
+
+adc: adc@f000c000 {
+	compatible = "nuvoton,npcm750-adc";
+	reg = <0xf000c000 0x8>;
+	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&clk NPCM7XX_CLK_ADC>;
+};
+
+rst: rst@f0801000 {
+	compatible = "nuvoton,npcm750-rst", "syscon",
+	"simple-mfd";
+	reg = <0xf0801000 0x6C>;
+};