[v10,05/12] ARM: dts: aspeed: peci: Add PECI node

Message ID 20190107214136.5256-6-jae.hyun.yoo@linux.intel.com
State Not Applicable, archived
Headers show
Series
  • PECI device driver introduction
Related show

Commit Message

Jae Hyun Yoo Jan. 7, 2019, 9:41 p.m.
This commit adds PECI bus/adapter node of AST24xx/AST25xx into
aspeed-g4 and aspeed-g5.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Joel Stanley <joel@jms.id.au>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Jason M Biils <jason.m.bills@linux.intel.com>
Cc: Ryan Chen <ryan_chen@aspeedtech.com>
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com>
Reviewed-by: James Feist <james.feist@linux.intel.com>
Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com>
---
 arch/arm/boot/dts/aspeed-g4.dtsi | 26 ++++++++++++++++++++++++++
 arch/arm/boot/dts/aspeed-g5.dtsi | 26 ++++++++++++++++++++++++++
 2 files changed, 52 insertions(+)

Comments

Joel Stanley Jan. 14, 2019, 5:45 a.m. | #1
Hi Jae,

On Tue, 8 Jan 2019 at 08:11, Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> wrote:
>
> This commit adds PECI bus/adapter node of AST24xx/AST25xx into
> aspeed-g4 and aspeed-g5.

This looks good, aside from the alias.

It will go via my aspeed tree once the bindings are merged. Send them
to linux-aspeed@lists.ozlabs.org at that time.

In the future I suggest leaving the changes to arch/arm/boot/dts until
after the bindings and driver patches have landed. They will rarely go
in before hand as the bindings need to be agreed on.


>                 serial3 = &uart4;
>                 serial4 = &uart5;
>                 serial5 = &vuart;
> +               peci0 = &peci0;

I don't think this is necessary. Can you explain why you think you need it?

Cheers,

Joel
Jae Hyun Yoo Jan. 14, 2019, 10:12 p.m. | #2
Hi Joel,

On 1/13/2019 9:45 PM, Joel Stanley wrote:
> Hi Jae,
> 
> On Tue, 8 Jan 2019 at 08:11, Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> wrote:
>>
>> This commit adds PECI bus/adapter node of AST24xx/AST25xx into
>> aspeed-g4 and aspeed-g5.
> 
> This looks good, aside from the alias.
> 
> It will go via my aspeed tree once the bindings are merged. Send them
> to linux-aspeed@lists.ozlabs.org at that time.
> 
> In the future I suggest leaving the changes to arch/arm/boot/dts until
> after the bindings and driver patches have landed. They will rarely go
> in before hand as the bindings need to be agreed on.
> 

I thought that it would be helpful if it shows an actual example in this
series because it is trying to add a new subsystem. In the future, I'll
submit a dts patch separately from bindings and drivers, but I'd like
to keep this dts changes in this series because it has been already
submitted. I'll CC linux-aspeed list from the next version. Thanks!

> 
>>                  serial3 = &uart4;
>>                  serial4 = &uart5;
>>                  serial5 = &vuart;
>> +               peci0 = &peci0;
> 
> I don't think this is necessary. Can you explain why you think you need it?
> 

You are right. This alias is not necessary at all. Will drop it.

Thanks,
Jae

> Cheers,
> 
> Joel
>

Patch

diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 69f6b9d2e7e7..fa5c358e199c 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -29,6 +29,7 @@ 
 		serial3 = &uart4;
 		serial4 = &uart5;
 		serial5 = &vuart;
+		peci0 = &peci0;
 	};
 
 	cpus {
@@ -317,6 +318,13 @@ 
 				};
 			};
 
+			peci: bus@1e78b000 {
+				compatible = "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x0 0x1e78b000 0x60>;
+			};
+
 			uart2: serial@1e78d000 {
 				compatible = "ns16550a";
 				reg = <0x1e78d000 0x20>;
@@ -360,6 +368,24 @@ 
 	};
 };
 
+&peci {
+	peci0: peci-bus@0 {
+		compatible = "aspeed,ast2400-peci";
+		reg = <0x0 0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		interrupts = <15>;
+		clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+		resets = <&syscon ASPEED_RESET_PECI>;
+		clock-frequency = <24000000>;
+		msg-timing = <1>;
+		addr-timing = <1>;
+		rd-sampling-point = <8>;
+		cmd-timeout-ms = <1000>;
+		status = "disabled";
+	};
+};
+
 &i2c {
 	i2c_ic: interrupt-controller@0 {
 		#interrupt-cells = <1>;
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index d107459fc0f8..63900714fbd7 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -29,6 +29,7 @@ 
 		serial3 = &uart4;
 		serial4 = &uart5;
 		serial5 = &vuart;
+		peci0 = &peci0;
 	};
 
 	cpus {
@@ -377,6 +378,13 @@ 
 				};
 			};
 
+			peci: bus@1e78b000 {
+				compatible = "simple-bus";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x0 0x1e78b000 0x60>;
+			};
+
 			uart2: serial@1e78d000 {
 				compatible = "ns16550a";
 				reg = <0x1e78d000 0x20>;
@@ -420,6 +428,24 @@ 
 	};
 };
 
+&peci {
+	peci0: peci-bus@0 {
+		compatible = "aspeed,ast2500-peci";
+		reg = <0x0 0x60>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		interrupts = <15>;
+		clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
+		resets = <&syscon ASPEED_RESET_PECI>;
+		clock-frequency = <24000000>;
+		msg-timing = <1>;
+		addr-timing = <1>;
+		rd-sampling-point = <8>;
+		cmd-timeout-ms = <1000>;
+		status = "disabled";
+	};
+};
+
 &i2c {
 	i2c_ic: interrupt-controller@0 {
 		#interrupt-cells = <1>;