From patchwork Mon Jun 27 13:22:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avi Kivity X-Patchwork-Id: 102162 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 0BD72B6F72 for ; Mon, 27 Jun 2011 23:36:44 +1000 (EST) Received: from localhost ([::1]:49074 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QbBzT-00009R-M3 for incoming@patchwork.ozlabs.org; Mon, 27 Jun 2011 09:36:39 -0400 Received: from eggs.gnu.org ([140.186.70.92]:48685) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QbBlb-0005hc-4t for qemu-devel@nongnu.org; Mon, 27 Jun 2011 09:22:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QbBlX-0002GD-TL for qemu-devel@nongnu.org; Mon, 27 Jun 2011 09:22:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11303) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QbBlV-0002E8-Tb for qemu-devel@nongnu.org; Mon, 27 Jun 2011 09:22:14 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p5RDMCuk009384 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 27 Jun 2011 09:22:13 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p5RDMBGI015357; Mon, 27 Jun 2011 09:22:12 -0400 Received: from s01.tlv.redhat.com (s01.tlv.redhat.com [10.35.255.8]) by cleopatra.tlv.redhat.com (Postfix) with ESMTP id 03DB4B0649; Mon, 27 Jun 2011 16:22:10 +0300 (IDT) From: Avi Kivity To: qemu-devel@nongnu.org Date: Mon, 27 Jun 2011 16:22:05 +0300 Message-Id: <1309180927-19003-19-git-send-email-avi@redhat.com> In-Reply-To: <1309180927-19003-1-git-send-email-avi@redhat.com> References: <1309180927-19003-1-git-send-email-avi@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: kvm@vger.kernel.org Subject: [Qemu-devel] [RFC v2 18/20] cirrus: simplify vga window mmio access functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make use of the memory API's ability to satisfy multi-byte accesses via multiple single-byte accesses. Signed-off-by: Avi Kivity --- hw/cirrus_vga.c | 83 ++++++++---------------------------------------------- 1 files changed, 13 insertions(+), 70 deletions(-) diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index 6312c6e..6e9e83d 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -1955,9 +1955,11 @@ static void cirrus_mem_writeb_mode4and5_16bpp(CirrusVGAState * s, * ***************************************/ -static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr) +static uint64_t cirrus_vga_mem_read(MemoryRegion *mr, + target_phys_addr_t addr, + uint32_t size) { - CirrusVGAState *s = opaque; + CirrusVGAState *s = container_of(mr, CirrusVGAState, low_mem); unsigned bank_index; unsigned bank_offset; uint32_t val; @@ -1966,8 +1968,6 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr) return vga_mem_readb(s, addr); } - addr &= 0x1ffff; - if (addr < 0x10000) { /* XXX handle bitblt */ /* video memory */ @@ -1999,30 +1999,12 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr) return val; } -static uint32_t cirrus_vga_mem_readw(void *opaque, target_phys_addr_t addr) +static void cirrus_vga_mem_write(MemoryRegion *mr, + target_phys_addr_t addr, + uint64_t mem_value, + uint32_t size) { - uint32_t v; - - v = cirrus_vga_mem_readb(opaque, addr); - v |= cirrus_vga_mem_readb(opaque, addr + 1) << 8; - return v; -} - -static uint32_t cirrus_vga_mem_readl(void *opaque, target_phys_addr_t addr) -{ - uint32_t v; - - v = cirrus_vga_mem_readb(opaque, addr); - v |= cirrus_vga_mem_readb(opaque, addr + 1) << 8; - v |= cirrus_vga_mem_readb(opaque, addr + 2) << 16; - v |= cirrus_vga_mem_readb(opaque, addr + 3) << 24; - return v; -} - -static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr, - uint32_t mem_value) -{ - CirrusVGAState *s = opaque; + CirrusVGAState *s = container_of(mr, CirrusVGAState, low_mem); unsigned bank_index; unsigned bank_offset; unsigned mode; @@ -2032,8 +2014,6 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr, return; } - addr &= 0x1ffff; - if (addr < 0x10000) { if (s->cirrus_srcptr != s->cirrus_srcptr_end) { /* bitblt */ @@ -2083,51 +2063,14 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr, } } -static void cirrus_vga_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) -{ - cirrus_vga_mem_writeb(opaque, addr, val & 0xff); - cirrus_vga_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff); -} - -static void cirrus_vga_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) -{ - cirrus_vga_mem_writeb(opaque, addr, val & 0xff); - cirrus_vga_mem_writeb(opaque, addr + 1, (val >> 8) & 0xff); - cirrus_vga_mem_writeb(opaque, addr + 2, (val >> 16) & 0xff); - cirrus_vga_mem_writeb(opaque, addr + 3, (val >> 24) & 0xff); -} - -static uint64_t cirrus_vga_mem_read(MemoryRegion *mr, - target_phys_addr_t addr, - uint32_t size) -{ - CirrusVGAState *s = container_of(mr, CirrusVGAState, low_mem); - - switch (size) { - case 1: return cirrus_vga_mem_readb(s, addr); - case 2: return cirrus_vga_mem_readw(s, addr); - case 4: return cirrus_vga_mem_readl(s, addr); - default: abort(); - } -} - -static void cirrus_vga_mem_write(MemoryRegion *mr, target_phys_addr_t addr, - uint64_t data, unsigned size) -{ - CirrusVGAState *s = container_of(mr, CirrusVGAState, low_mem); - - switch (size) { - case 1: return cirrus_vga_mem_writeb(s, addr, data); - case 2: return cirrus_vga_mem_writew(s, addr, data); - case 4: return cirrus_vga_mem_writel(s, addr, data); - default: abort(); - } -}; - static MemoryRegionOps cirrus_vga_mem_ops = { .read = cirrus_vga_mem_read, .write = cirrus_vga_mem_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, }; /***************************************