From patchwork Thu Jan 3 10:04:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nagarjuna Kristam X-Patchwork-Id: 1020227 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="inXy/eHg"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43Vk8Q48LLz9s9G for ; Thu, 3 Jan 2019 21:06:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730699AbfACKGO (ORCPT ); Thu, 3 Jan 2019 05:06:14 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:19863 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730697AbfACKGN (ORCPT ); Thu, 3 Jan 2019 05:06:13 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 03 Jan 2019 02:05:51 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Thu, 03 Jan 2019 02:06:11 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Thu, 03 Jan 2019 02:06:11 -0800 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 3 Jan 2019 10:06:11 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 3 Jan 2019 10:06:11 +0000 Received: from nkristam-ubuntu.nvidia.com (Not Verified[10.19.65.96]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Thu, 03 Jan 2019 02:06:10 -0800 From: Nagarjuna Kristam To: , , , CC: , , Nagarjuna Kristam Subject: [PATCH 6/8] dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding Date: Thu, 3 Jan 2019 15:34:57 +0530 Message-ID: <1546509899-5071-7-git-send-email-nkristam@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1546509899-5071-1-git-send-email-nkristam@nvidia.com> References: <1546509899-5071-1-git-send-email-nkristam@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1546509951; bh=+Xd6/NvxF2DK5siFihAsUbI5FX6RSFU4Gd13tZQG8aI=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=inXy/eHg4hnXUoBHfZGNNQtUGPvwaFf/wUa+PcNaLBS2IA4STPiLB4iKMdf56afxV uk1kofbP/TH6ceKb4KneUigoeRYRsz6EVFtT69inRrN9SqnCVafrKlvRlD/XEL0nLJ KU3YAv+tA1wQ5qMhzuhK5I/zukLXCKGWZSGCngKdg8NP93v0MRES6iw+kFOyZdIdoc pMiMfuRngF4u42FsVXOeCpXQe3ou3P/23ZJUdyGuc8qCfqTyhi4KJkTGR+gn6m5ou7 KfEMOErodzKaHN/cNTFCihs+LMt7VVra57kMbQLkdUH6qQ5YL4H3/gn0Nl/jtH7uF2 +0ZEBMIEdW8vQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add device-tree binding documentation for the XUSB device mode controller present on tegra210 SoC. This controller supports USB 3.0 specification Based on work by Andrew Bresticker . Signed-off-by: Nagarjuna Kristam --- .../devicetree/bindings/usb/nvidia,tegra-xudc.txt | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt new file mode 100644 index 0000000..244044b --- /dev/null +++ b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.txt @@ -0,0 +1,67 @@ +Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC) +============================ + +The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and +USB 3.0 SuperSpeed protocols. + +Required properties: +-------------------- +- compatible: For Tegra210, must contain "nvidia,tegra210-xudc". +- reg: Must contain the base and length of the XUSB device registers, XUSB device + PCI Config registers and XUSB device controller registers. +- interrupts: Must contain the XUSB device interrupt +- clocks: Must contain an entry for ell clocks used. + See ../clock/clock-bindings.txt for details. +- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to + configure the USB pads used by the XSUB controller +- power-domains: A list of PM domain specifiers that reference each power-domain + used by the XUSB device mode controller. This list must comprise of a specifier + for the XUSBA and XUSBB power-domains. See ../power/power_domain.txt and + ../arm/tegra/nvidia,tegra20-pmc.txt for details. +- power-domain-names: A list of names that represent each of the specifiers in + the 'power-domains' property. Must include 'xusb_ss' and 'xusb_device' + +For Tegra210: +- avddio_usb-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. +- hvdd_usb-supply: USB controller power supply. Must supply 3.3 V. +- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. + +- phys: Must contain an entry for each entry in phy-names. + See ../phy/phy-bindings.txt for details. +- extcon-cables: Must contains an extcon-cable entry which detects + USB VBUS pin. See ../extcon/extcon-usb-gpio.txt for details. + +Optional properties: +-------------------- +- phy-names: Should include an entry for each PHY used by the controller. + Names must be "usb2", and "usb3" if support SuperSpeed device mode. + - "usb3" phy, SuperSpeed (SSTX+/SSTX-/SSRX+/SSRX-) data lines + - "usb2" phy, USB 2.0 (D+/D-) data lines + +Example: +-------- + extcon_usb: extcon_vbus { + compatible = "linux,extcon-usb-gpio"; + vbus-gpio = <&gpio TEGRA_GPIO(Z, 0) 1>; + }; + xudc@700d0000 { + compatible = "nvidia,tegra210-xudc"; + phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>; + phy-names = "usb2; + power-domains = <&pd_xusbdev>, <&pd_xusbss>; + power-domain-names = "xusb_device", "xusb_ss"; + avddio_usb-supply = <&vdd_pex_1v05>; + hvdd_usb-supply = <&vdd_3v3_sys>; + avdd_pll_utmip-supply = <&vdd_1v8>; + reg = <0x0 0x700d0000 0x0 0x8000>, + <0x0 0x700d8000 0x0 0x1000>, + <0x0 0x700d9000 0x0 0x1000>; + interrupts = <0 44 0x4>; + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>; + nvidia,xusb-padctl = <&padctl>; + extcon = <&extcon_usb>; + };