From patchwork Thu Dec 27 18:13:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 1018969 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=crapouillou.net header.i=@crapouillou.net header.b="FC/btq9j"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43QdLZ23Rmz9s8J for ; Fri, 28 Dec 2018 05:15:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728721AbeL0SPi (ORCPT ); Thu, 27 Dec 2018 13:15:38 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:53792 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726982AbeL0SN7 (ORCPT ); Thu, 27 Dec 2018 13:13:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1545934435; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=97gZpq5eTpivMWrRpp/HIsXxIT7K2juYtyAs2Sp2NwA=; b=FC/btq9jSV6KkMmNyJ3xGzr9nJedrWec15hCHTkfInSksDQ0cCJLdsp5rBqG9OU3QHptA3 woyKahjJ4cKDHIaO7uDpwNtojEkAE5TTGUxnBnOllPabjcBsOIrdPkSqccfGD+stESJAJd p4rQO4Plhq8iJ51WqRV5IkKpcEmImC8= From: Paul Cercueil To: Thierry Reding , Rob Herring , Mark Rutland , Daniel Lezcano , Thomas Gleixner , Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-mips@vger.kernel.org, linux-doc@vger.kernel.org, linux-clk@vger.kernel.org, Paul Cercueil Subject: [PATCH v9 14/27] pwm: jz4740: Improve algorithm of clock calculation Date: Thu, 27 Dec 2018 19:13:06 +0100 Message-Id: <20181227181319.31095-15-paul@crapouillou.net> In-Reply-To: <20181227181319.31095-1-paul@crapouillou.net> References: <20181227181319.31095-1-paul@crapouillou.net> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The previous algorithm hardcoded details about how the TCU clocks work. The new algorithm will use clk_round_rate to find the perfect clock rate for the PWM channel. Signed-off-by: Paul Cercueil --- Notes: v9: New patch drivers/pwm/pwm-jz4740.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c index c6136bd4434b..dd80a2cf6528 100644 --- a/drivers/pwm/pwm-jz4740.c +++ b/drivers/pwm/pwm-jz4740.c @@ -110,23 +110,27 @@ static int jz4740_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip); struct clk *clk = jz4740->clks[pwm->hwpwm], *parent_clk = clk_get_parent(clk); - unsigned long rate, period, duty; + unsigned long rate, new_rate, period, duty; unsigned long long tmp; - unsigned int prescaler = 0; rate = clk_get_rate(parent_clk); - tmp = (unsigned long long)rate * state->period; - do_div(tmp, 1000000000); - period = tmp; - while (period > 0xffff && prescaler < 6) { - period >>= 2; - rate >>= 2; - ++prescaler; + for (;;) { + tmp = (unsigned long long)rate * state->period; + do_div(tmp, 1000000000); + + if (tmp <= 0xffff) + break; + + new_rate = clk_round_rate(clk, rate - 1); + + if (new_rate < rate) + rate = new_rate; + else + return -EINVAL; } - if (prescaler == 6) - return -EINVAL; + period = tmp; tmp = (unsigned long long)period * state->duty_cycle; do_div(tmp, state->period);