From patchwork Fri Jun 24 16:56:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Hajnoczi X-Patchwork-Id: 101864 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id EECCAB6F86 for ; Sat, 25 Jun 2011 04:39:53 +1000 (EST) Received: from localhost ([::1]:60281 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QaBID-0006D5-1f for incoming@patchwork.ozlabs.org; Fri, 24 Jun 2011 14:39:49 -0400 Received: from eggs.gnu.org ([140.186.70.92]:46521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qa9hL-0004Uu-Mq for qemu-devel@nongnu.org; Fri, 24 Jun 2011 12:57:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qa9hJ-0001Wa-A0 for qemu-devel@nongnu.org; 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Fri, 24 Jun 2011 09:57:36 -0700 (PDT) Received: from localhost.localdomain (gbibp9ph1--blueice3n2.emea.ibm.com [195.212.29.84]) by mx.google.com with ESMTPS id h28sm1763884faj.5.2011.06.24.09.57.34 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 24 Jun 2011 09:57:35 -0700 (PDT) From: Stefan Hajnoczi To: Date: Fri, 24 Jun 2011 17:56:42 +0100 Message-Id: <1308934609-20824-7-git-send-email-stefanha@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1308934609-20824-1-git-send-email-stefanha@linux.vnet.ibm.com> References: <1308934609-20824-1-git-send-email-stefanha@linux.vnet.ibm.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.161.45 Cc: Anthony Liguori , Markus Armbruster , Stefan Hajnoczi Subject: [Qemu-devel] [PATCH 06/13] Spell "unkown" correctly in error_report() arguments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Markus Armbruster Signed-off-by: Markus Armbruster Signed-off-by: Stefan Hajnoczi --- hw/lm32_sys.c | 2 +- hw/lm32_timer.c | 4 ++-- hw/lm32_uart.c | 4 ++-- hw/milkymist-ac97.c | 4 ++-- hw/milkymist-memcard.c | 4 ++-- hw/milkymist-sysctl.c | 4 ++-- 6 files changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/lm32_sys.c b/hw/lm32_sys.c index 427b05f..e5ff962 100644 --- a/hw/lm32_sys.c +++ b/hw/lm32_sys.c @@ -83,7 +83,7 @@ static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("lm32_sys: write access to unkown register 0x" + error_report("lm32_sys: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/lm32_timer.c b/hw/lm32_timer.c index ed28984..49cbb22 100644 --- a/hw/lm32_timer.c +++ b/hw/lm32_timer.c @@ -86,7 +86,7 @@ static uint32_t timer_read(void *opaque, target_phys_addr_t addr) r = (uint32_t)ptimer_get_count(s->ptimer); break; default: - error_report("lm32_timer: read access to unkown register 0x" + error_report("lm32_timer: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -124,7 +124,7 @@ static void timer_write(void *opaque, target_phys_addr_t addr, uint32_t value) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_timer: write access to unkown register 0x" + error_report("lm32_timer: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/lm32_uart.c b/hw/lm32_uart.c index e225087..09090e9 100644 --- a/hw/lm32_uart.c +++ b/hw/lm32_uart.c @@ -149,7 +149,7 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t addr) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_uart: read access to unkown register 0x" + error_report("lm32_uart: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -185,7 +185,7 @@ static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value) TARGET_FMT_plx, addr << 2); break; default: - error_report("lm32_uart: write access to unkown register 0x" + error_report("lm32_uart: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/milkymist-ac97.c b/hw/milkymist-ac97.c index 6c9e318..6104732 100644 --- a/hw/milkymist-ac97.c +++ b/hw/milkymist-ac97.c @@ -103,7 +103,7 @@ static uint32_t ac97_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_ac97: read access to unkown register 0x" + error_report("milkymist_ac97: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -152,7 +152,7 @@ static void ac97_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_ac97: write access to unkown register 0x" + error_report("milkymist_ac97: write access to unknown register 0x" TARGET_FMT_plx, addr); break; } diff --git a/hw/milkymist-memcard.c b/hw/milkymist-memcard.c index 06077af..22dc377 100644 --- a/hw/milkymist-memcard.c +++ b/hw/milkymist-memcard.c @@ -154,7 +154,7 @@ static uint32_t memcard_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_memcard: read access to unkown register 0x" + error_report("milkymist_memcard: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -210,7 +210,7 @@ static void memcard_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_memcard: write access to unkown register 0x" + error_report("milkymist_memcard: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } diff --git a/hw/milkymist-sysctl.c b/hw/milkymist-sysctl.c index 6bd0cb9..7b2d544 100644 --- a/hw/milkymist-sysctl.c +++ b/hw/milkymist-sysctl.c @@ -119,7 +119,7 @@ static uint32_t sysctl_read(void *opaque, target_phys_addr_t addr) break; default: - error_report("milkymist_sysctl: read access to unkown register 0x" + error_report("milkymist_sysctl: read access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } @@ -189,7 +189,7 @@ static void sysctl_write(void *opaque, target_phys_addr_t addr, uint32_t value) break; default: - error_report("milkymist_sysctl: write access to unkown register 0x" + error_report("milkymist_sysctl: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; }