From patchwork Fri Dec 21 12:58:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qii Wang X-Patchwork-Id: 1017504 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43LpcQ4pLmz9sMM for ; Fri, 21 Dec 2018 23:59:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390467AbeLUM7Q (ORCPT ); Fri, 21 Dec 2018 07:59:16 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:29407 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2388308AbeLUM7P (ORCPT ); Fri, 21 Dec 2018 07:59:15 -0500 X-UUID: 42ca9e79d8af4e8fa2fc279d06fa8ea3-20181221 X-UUID: 42ca9e79d8af4e8fa2fc279d06fa8ea3-20181221 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 985126288; Fri, 21 Dec 2018 20:59:05 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 21 Dec 2018 20:59:03 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 21 Dec 2018 20:59:03 +0800 From: qii wang To: CC: , , , , , , , , Subject: [PATCH 5/6] dt-bindings: i2c: Add Mediatek MT8183 i2c binding Date: Fri, 21 Dec 2018 20:58:30 +0800 Message-ID: <1545397111-24183-6-git-send-email-qii.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1545397111-24183-1-git-send-email-qii.wang@mediatek.com> References: <1545397111-24183-1-git-send-email-qii.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add MT8183 i2c binding to binding file. Compare to 2712 i2c controller, MT8183 has different registers, offsets, clock, and multi-user function. Signed-off-by: qii wang Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/i2c/i2c-mtk.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt index ee4c324..0d29a5b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mtk.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mtk.txt @@ -12,14 +12,15 @@ Required properties: "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623 "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629 "mediatek,mt8173-i2c": for MediaTek MT8173 + "mediatek,mt8183-i2c": for MediaTek MT8183 - reg: physical base address of the controller and dma base, length of memory mapped region. - interrupts: interrupt number to the cpu. - clock-div: the fixed value for frequency divider of clock source in i2c module. Each IC may be different. - clocks: clock name from clock manager - - clock-names: Must include "main" and "dma", if enable have-pmic need include - "pmic" extra. + - clock-names: Must include "main" and "dma", "arb" is optional, if enable + have-pmic need include "pmic" extra. Optional properties: - clock-frequency: Frequency in Hz of the bus when transfer, the default value @@ -27,6 +28,7 @@ Optional properties: - mediatek,have-pmic: platform can control i2c form special pmic side. Only mt6589 and mt8135 support this feature. - mediatek,use-push-pull: IO config use push-pull mode. + - mediatek,share-i3c: i3c controller can share i2c function. Example: