x86: VAESDEC{,LAST} allow memory inputs
diff mbox series

Message ID 5C1CA7CD020000780020864C@prv1-mh.provo.novell.com
State New
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Series
  • x86: VAESDEC{,LAST} allow memory inputs
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Commit Message

Jan Beulich Dec. 21, 2018, 8:43 a.m. UTC
They are no different from their VAESENC{,LAST} counterparts in this
regard.

gcc/
2018-12-21  Jan Beulich  <jbeulich@suse.com>

	* config/i386/sse.md (vaesdec_<mode>, vaesdeclast_<mode>): Allow
	memory input.

Comments

Uros Bizjak Dec. 21, 2018, 9:05 a.m. UTC | #1
On Fri, Dec 21, 2018 at 9:43 AM Jan Beulich <JBeulich@suse.com> wrote:
>
> They are no different from their VAESENC{,LAST} counterparts in this
> regard.
>
> gcc/
> 2018-12-21  Jan Beulich  <jbeulich@suse.com>
>
>         * config/i386/sse.md (vaesdec_<mode>, vaesdeclast_<mode>): Allow
>         memory input.

OK.

Thanks,
Uros.

> --- a/gcc/config/i386/sse.md
> +++ b/gcc/config/i386/sse.md
> @@ -21659,7 +21659,7 @@
>    [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v")
>         (unspec:VI1_AVX512VL_F
>           [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v")
> -          (match_operand:VI1_AVX512VL_F 2 "vector_operand" "v")]
> +          (match_operand:VI1_AVX512VL_F 2 "vector_operand" "vm")]
>           UNSPEC_VAESDEC))]
>    "TARGET_VAES"
>    "vaesdec\t{%2, %1, %0|%0, %1, %2}"
> @@ -21669,7 +21669,7 @@
>    [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v")
>         (unspec:VI1_AVX512VL_F
>           [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v")
> -          (match_operand:VI1_AVX512VL_F 2 "vector_operand" "v")]
> +          (match_operand:VI1_AVX512VL_F 2 "vector_operand" "vm")]
>           UNSPEC_VAESDECLAST))]
>    "TARGET_VAES"
>    "vaesdeclast\t{%2, %1, %0|%0, %1, %2}"
>
>
>

Patch
diff mbox series

--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -21659,7 +21659,7 @@ 
   [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v")
 	(unspec:VI1_AVX512VL_F
 	  [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v")
-	   (match_operand:VI1_AVX512VL_F 2 "vector_operand" "v")]
+	   (match_operand:VI1_AVX512VL_F 2 "vector_operand" "vm")]
 	  UNSPEC_VAESDEC))]
   "TARGET_VAES"
   "vaesdec\t{%2, %1, %0|%0, %1, %2}"
@@ -21669,7 +21669,7 @@ 
   [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v")
 	(unspec:VI1_AVX512VL_F
 	  [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v")
-	   (match_operand:VI1_AVX512VL_F 2 "vector_operand" "v")]
+	   (match_operand:VI1_AVX512VL_F 2 "vector_operand" "vm")]
 	  UNSPEC_VAESDECLAST))]
   "TARGET_VAES"
   "vaesdeclast\t{%2, %1, %0|%0, %1, %2}"