From patchwork Mon Dec 17 06:01:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Schaeckeler X-Patchwork-Id: 1014292 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43J9jH5Srsz9sD9 for ; Mon, 17 Dec 2018 17:09:39 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gmx.net Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 43J9jH3p5SzDqcj for ; Mon, 17 Dec 2018 17:09:39 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=gmx.net X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmx.net (client-ip=212.227.17.21; helo=mout.gmx.net; envelope-from=schaecsn@gmx.net; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=gmx.net Received: from mout.gmx.net (mout.gmx.net [212.227.17.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 43J9j62jZYzDqYW for ; Mon, 17 Dec 2018 17:09:30 +1100 (AEDT) Received: from corona.crabdance.com ([173.228.106.209]) by mail.gmx.com (mrgmx103 [212.227.17.168]) with ESMTPSA (Nemesis) id 0MUHbK-1gyes32odu-00R3oy; Mon, 17 Dec 2018 07:03:34 +0100 Received: by corona.crabdance.com (Postfix, from userid 1001) id 9C5116E85602; Sun, 16 Dec 2018 22:03:25 -0800 (PST) From: Stefan Schaeckeler To: Rob Herring , Mark Rutland , Joel Stanley , Andrew Jeffery , Borislav Petkov , Mauro Carvalho Chehab , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-edac@vger.kernel.org Subject: [PATCH 2/2] dt-bindings: edac: Aspeed AST2500 Date: Sun, 16 Dec 2018 22:01:57 -0800 Message-Id: <1545026517-64069-3-git-send-email-schaecsn@gmx.net> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1545026517-64069-1-git-send-email-schaecsn@gmx.net> References: <1545026517-64069-1-git-send-email-schaecsn@gmx.net> X-Provags-ID: V03:K1:MyWwx3gGskanIwe0jDsnK8d7E2zY9k8gWtJXmZkccmuO4erj1bH ymZXIVv4zZXpdrndTR4X72/n37JJ7qxeGnMdaZG4/fVSami207jaxTziuxlinSR8sDrUcF+ qKRYixdG0GW3xr/0FGpi6FP2BYOHcxwtaDMW6wQfyTxWkZ+cpE8bNLAufo1ijQLUwRizkoq srDURXm9mVvzm8OBLovwA== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:BUEGtqmqifA=:UG4kAXtZ35OjqDCEXCfUyB ONV/RluUzELh2xpzud8y86nLA0jmQHbC6iyP+LoVRhpWrDpIHB+nlfHzcuXvUpKgiQFA0ZP9f 0M65UQ27opzzPflQR7q4Rte1GvjUQy7DubsZ6ALXnJ5UPgZRGYuwOfk92YqWm5fjibg3vCa4p LT1UojYIO11Xnky2pZJ+QoeaUKKfY/Dc2/KYO1tLueh+54J46D5640fB/kLmdXhIXG4kyq4xY QiMjMn1CJ8S98KyzRpeL1AV1KAmKNTvbimTE2tOTK7DUgIW7TWTP2XO3PyuWS04Ab0z5aZP2D g7Y+kP+AKseim7kMK+VbM8trYlRWWpnX+FmW1xXonL2qaAhxSLVlS7k/9jLT0eCKI2lfrkrb6 dfIxcSzmNQn03wEGHbMV1swiifh3LvML9QLMXzr/dsFIBj531TMzcTWw796ykIvWzg/bETHOH iGzqoeHCjB0oDJqV3D1X9cyLmiD61tJY1TjV6yUb2E9uqVsZPy2wccLXnsPbjDBiIgSBoRQIu Ogq2oeNdK94wvOLufCakifolhJpyx9u+0X4yXceQQHUpqRB1emhsEtikvLmlnfsY90FyXia1V S8LrLuKM/JjXmPTuFMOXG+iEqQ6w1wYaey33V57s/tqXefOSNW14G8kAxroZQIA2p4m+w43sn O9TJaJVLVw5vtGJu9IfOK4Le9Htkt0o8iJk58dGMOIqEssr7jhFIzVaqusdH7GQu/Dyqyn6og 9GkUIzXEqg3qE7cVN0tX58Wt1ga6XFuIhtAVPhqlDl/H93v4iAFfsHNXaEemwOMaVLwnCB++y BKmA9lKfEQUSp3O7XTsCsfrME9uws5H9n2A1LGdRw/KljgvzjMJVDZxS80aLCTDOznb8WCyge qzGtA2ROYJ3NFzLyxDr94gyWCvjI0JukldqJ8S998= X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan M Schaeckeler Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Stefan M Schaeckeler Add support for the Aspeed AST2500 SoC EDAC driver. Signed-off-by: Stefan M Schaeckeler --- .../bindings/edac/aspeed-sdram-edac.txt | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt diff --git a/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt new file mode 100644 index 000000000000..57ba852883c7 --- /dev/null +++ b/Documentation/devicetree/bindings/edac/aspeed-sdram-edac.txt @@ -0,0 +1,34 @@ +Aspeed AST2500 SoC EDAC device driver + +The Aspeed AST2500 SoC supports DDR3 and DDR4 memory with and without ECC (error +correction check). + +The memory controller supports SECDED (single bit error correction, double bit +error detection) and single bit error auto scrubbing by reserving 8 bits for +every 64 bit word (effectively reducing available memory to 8/9). + +First, ECC must be configured in u-boot. Then, this driver will expose error +counters via the edac kernel framework. + +A note on memory organization in ECC mode: every 512 bytes are followed by 64 +bytes of ECC codes. The address remapping is done in hardware and is fully +transparent to firmware and software. Because of this, ECC mode must be +configured in u-boot as part of the memory initialization as one can not switch +from one mode to another when executing in memory. + + + +Required properties: +- compatible: should be "aspeed,ast2500-sdram-edac" +- reg: sdram controller register set should be <0x1e6e0000 0x174> +- interrupts: should be AVIC interrupt #0 + + +Example: + + edac: sdram@1e6e0000 { + compatible = "aspeed,ast2500-sdram-edac"; + reg = <0x1e6e0000 0x174>; + interrupts = <0>; + status = "okay"; + };